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參數資料
| 型號： | FSTU3253QSCX |
| 廠商： | FAIRCHILD SEMICONDUCTOR CORP |
| 元件分類： | 通用總線功能 |
| 英文描述： | 4-Input Digital Multiplexer |
| 中文描述： | CBT/FST/QS/5C/B SERIES, DUAL MULTIPLEXER, PDSO16 |
| 封裝： | 0.150 INCH, MO-137, QSOP-16 |
| 文件頁數： | 4/7頁 |
| 文件大?。?/td> | 212K |
| 代理商： | FSTU3253QSCX |
www.fairchildsemi.com
4
F
AC Electrical Characteristics
Note 6:
This parameter is guaranteed by design but is not tested. The bus switch contributes no propagation delay other than the RC delay of the typical On
resistance of the switch and the 50pF load capacitance, when driven by an ideal voltage the source (zero output impedance).
Capacitance
(Note 7)
Note 7:
T
A
=
+
25
°
C, f
=
1 MHz, Capacitance is characterized but not tested.
Undershoot Characteristic
(Note 8)
Note 8:
This test is intended to characterize the device
’
s protective capabilities by maintaining output signal integrity during an input transient voltage
undershoot event.
FIGURE 1.
Device Test Conditions
Transient
Input Voltage (V
IN
) Waveform
Symbol
Parameter
T
=
40
°
C to
+
85
°
C
C
L
=
50pF, RU
=
RD
=
500
V
CC
=
4.5 – 5.5V
Min
Max
0.25
0.5
5.7
0.5
5.7
Units
Conditions
Figure
Number
V
CC
=
4.0V
Min
Max
0.25
6.2
6.3
t
PHL
, t
PLH
Propagation Delay Bus to Bus (Note 6)
Propagation Delay, Select to Bus A
Output Enable Time, Select to Bus B
ns
V
I
=
OPEN
Figures
2, 3
t
PZH
, t
PZL
ns
V
I
=
7V for t
PZL
V
I
=
OPEN for t
PZH
V
I
=
7V for t
PLZ
V
I
=
OPEN for t
PHZ
Figures
2, 3
Output Enable Time, I
OE
to Bus A, B
Output Disable Time, Select to Bus B
Output Disable Time, I
OE
to Bus A, B
0.5
0.5
0.5
4.9
6.2
6.0
5.4
6.3
6.1
t
PHZ
, t
PLZ
ns
Figures
2, 3
Symbol
Parameter
Typ
3
Max
Units
pF
Conditions
C
IN
Control Pin Input Capacitance
V
CC
=
5.0V
C
I/O
A Port
Input/Output Capacitance
13
pF
V
CC
, OE
=
5.0V
B Port
5
pF
Symbol
V
OUTU
Parameter
Min
2.5
Typ
Max
Units
V
Conditions
Figure 1
Output Voltage During Undershoot
V
OH
- 0.3
Parameter
V
IN
R
1
=
R
2
V
TRI
V
CC
Value
Units
V
V
see Waveform
100K
11.0
5.5
V
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