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參數資料
| 型號： | FT3001UMX |
| 廠商： | Fairchild Semiconductor |
| 文件頁數： | 9/10頁 |
| 文件大小： | 0K |
| 描述： | IC RESET TIMER CONF DELAY 10UMLP |
| 標準包裝： | 1 |
| 系列： | * |
| 其它名稱： | FT3001UMXDKR |
2011 Fairchild Semiconductor Corporation
www.fairchildsemi.com
FT3001 Rev. 1.0.4
8
FT3001
—
Reset
Timer
with
Configurable
Delay
Physical Dimensions
A
B
C
SEATING
PLANE
DETAIL A
PIN#1 IDENT
RECOMMENDED
LAND PATTERN
NOTES:
A. PACKAGE DOES NOT FULLY CONFORM TO
JEDEC STANDARD.
B. DIMENSIONS ARE IN MILLIMETERS.
C. DIMENSIONS AND TOLERANCES PER
ASME Y14.5M, 1994.
D. LAND PATTERN RECOMMENDATION IS
BASED ON FSC DESIGN ONLY.
E. DRAWING FILENAME: MKT-UMLP10Arev3.
TOP VIEW
BOTTOM VIEW
0.15 C
0.08 C
0.15 C
2X
SIDE VIEW
0.10 C
0.05
3
6
1
0.10 C A B
0.05 C
0.55 MAX.
10
1.40
1.80
0.40
0.15
0.25
(10X)
0.35
0.45
(9X)
1.70
2.10
0.40
0.663
0.563
(9X)
0.225
(10X)
1
0.152
0.10
0.55
0.45
0.10
DETAIL A
SCALE : 2X
1.85
1.45
0.55
0.40
0.225
(10X)
9X
0.45
PIN#1 IDENT
OPTIONAL MINIMIAL
TOE LAND PATTERN
SCALE : 2X
LEAD
OPTION 1
SCALE : 2X
LEAD
OPTION 2
PACKAGE
EDGE
Figure 10.
10-Lead, Ultrathin MLP, 1.4 x 1.8 x 0.55 mm Package, 0.40 mm Pitch
Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner
without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or
obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, specifically the
warranty therein, which covers Fairchild products.
Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings:
http://www.fairchildsemi.com/packaging/.
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