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參數資料
| 型號： | G2996 |
| 英文描述： | DDR Termination Regulator with STR function.|Terminator Series |
| 中文描述： | 復員與STR函數終端調節。|終結者系列 |
| 文件頁數： | 1/12頁 |
| 文件大小： | 323K |
| 代理商： | G2996 |
Ver: 1.0
May 23, 2003
TEL: 886-3-5788833
http://www.gmt.com.tw
1
G2996
Global Mixed-mode Technology Inc.
DDR Termination Regulator
Features
Operation Supply Voltage: 2V to 5.5V
Low Supply Current: 230μA @ 2.5V
Low Output Offset
Source and Sink Current
Low External Component Count
No Inductor Required
No external Resistors Required
Thermal Shutdown Protection
Suspend to RAM (STR) function
SOP-8L with Power-Pad package
Applications
DDR-SDRAM Termination Voltage
DDR-I / DDR-II Termination Voltage
SSTL-2
SSTL-3
General Description
The G2996 is a linear regulator designed to meet the
JEDEC SSTL-2 and SSTL-3 (Series Stub Termination
Logic) specifications for termination of DDR-SDRAM.
It contains a high-speed operational amplifier that pro-
vides excellent response to the load transients. This
device can deliver 1.5A continuous current and tran-
sient peaks up to 3A in the application as required for
DDR-SDRAM termination. With an independent V
SENSE
pin, the G2996 can provide superior load regulation.
The G2996 provides a V
REF
output as the reference for
the applications of the chipset and DIMMs.
The G2996 can easily provide the accurate V
TT
and
V
REF
voltages without external resistors that PCB ar-
eas can be reduced. The quiescent current is as low
as 230μA @ 2.5V. So the power consumption can
meet the low power consumption applications.
The G2996 also has an active low shutdown (SD ) pin
that provides Suspend To RAM (STR) functionality.
When SD is pulled low, the V
TT
output will be
tri-state providing a high impendence, but V
REF
will
remain active. A power saving advantage can be ob-
tained in this mode through lowering the quiescent
current to130μA @ 2.5V.
Ordering Information
ORDER
NUMBER
G2996P1X
G2996F1X
Note: X Specify the packing type
U: Tape & Reel T: Tube
*
SOP-8L (FD): Thermal Pad
MARKING
TEMP.
RANGE
-40°C to 85°C
-40°C to 85°C SOP-8L (FD)*
PACKAGE
G2996
G2996
SOP-8L
Pin Configuration
Typical Application Circuit
VSENSE
8
6
5
1
2
3
4
SD
GND
VTT
PVIN
AVIN
VDDQ
8Pin SOP
G2996
7
VREF
Pad
+
+
+
SD
V
REF
V
DDQ
AV
IN
V
SENSE
PV
IN
V
TT
GND
V
TT
=1.25V
0.01μF
V
DDQ
=2.5V
V
DD
=2.5V
SD
47μF
220μF
Thermal
V
REF
=1.25V
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相關代理商/技術參數 |
參數描述 |
|---|---|
| G2996F1U | 制造商:GMT 制造商全稱:Global Mixed-mode Technology Inc 功能描述:DDR I/II Termination Regulator |
| G2996F1UF | 制造商:GMT 制造商全稱:Global Mixed-mode Technology Inc 功能描述:DDR I/II Termination Regulator |
| G2996P1U | 制造商:GMT 制造商全稱:Global Mixed-mode Technology Inc 功能描述:DDR I/II Termination Regulator |
| G2996P1UF | 制造商:GMT 制造商全稱:Global Mixed-mode Technology Inc 功能描述:DDR I/II Termination Regulator |
| G2997 | 制造商:GMT 制造商全稱:Global Mixed-mode Technology Inc 功能描述:DDR Termination Regulator |
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