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參數資料
| 型號： | GS816272CC |
| 廠商： | GSI TECHNOLOGY |
| 英文描述： | 256K x 72 18Mb S/DCD Sync Burst SRAMs |
| 中文描述： | 256 × 72 35.7的S /雙氰胺同步突發靜態存儲器 |
| 文件頁數： | 26/31頁 |
| 文件大小： | 678K |
| 代理商： | GS816272CC |
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GS816272CC-333/300/250/200/150
Preliminary
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
Rev: 1.01 2/2005
26/31
2004, GSI Technology
JTAG Port AC Test Conditions
JTAG TAP Instruction Set Summary
Instruction
Code
Description
Notes
EXTEST
000
Places the Boundary Scan Register between TDI and TDO.
1
IDCODE
001
Preloads ID Register and places it between TDI and TDO.
1, 2
SAMPLE-Z
010
Captures I/O ring contents. Places the Boundary Scan Register between TDI and
TDO.
Forces all RAM output drivers to High-Z.
Do not use this instruction; Reserved for Future Use.
Replicates BYPASS instruction. Places Bypass Register between TDI and TDO.
1
RFU
011
1
SAMPLE/
PRELOAD
100
Captures I/O ring contents. Places the Boundary Scan Register between TDI and
TDO.
1
GSI
101
GSI private instruction.
Do not use this instruction; Reserved for Future Use.
Replicates BYPASS instruction. Places Bypass Register between TDI and TDO.
1
RFU
110
1
BYPASS
111
Places Bypass Register between TDI and TDO.
1
Notes:
1.
2.
Instruction codes expressed in binary, MSB on left, LSB on right.
Default instruction automatically loaded at power-up and in test-logic-reset state.
Notes:
1.
2.
Include scope and jig capacitance.
Test conditions as shown unless otherwise noted.
Parameter
Conditions
V
DD
– 0.2 V
0.2 V
1 V/ns
V
DDQ
/2
V
DDQ
/2
Input high level
Input low level
Input slew rate
Input reference level
Output reference level
DQ
V
DDQ
/2
50
30pF
*
JTAG Port AC Test Load
* Distributed Test Jig Capacitance
相關PDF資料 |
PDF描述 |
|---|---|
| GS816272CC-150 | 256K x 72 18Mb S/DCD Sync Burst SRAMs |
| GS816272CC-150I | 256K x 72 18Mb S/DCD Sync Burst SRAMs |
| GS816272CC-200 | 256K x 72 18Mb S/DCD Sync Burst SRAMs |
| GS816272CC-200I | 256K x 72 18Mb S/DCD Sync Burst SRAMs |
| GS816272CC-250 | 256K x 72 18Mb S/DCD Sync Burst SRAMs |
相關代理商/技術參數 |
參數描述 |
|---|---|
| GS816272CC-150 | 制造商:GSI Technology 功能描述:SRAM SYNC OCTAL 2.5V/3.3V 18MBIT 256KX72 7.5NS/3.8NS 209FBGA - Trays |
| GS816272CC-150I | 制造商:GSI Technology 功能描述:SRAM SYNC OCTAL 2.5V/3.3V 18MBIT 256KX72 7.5NS/3.8NS 209FBGA - Trays |
| GS816272CC-150IV | 制造商:GSI Technology 功能描述:SRAM SYNC OCTAL 1.8V/2.5V 18MBIT 256KX72 7.5NS/3.8NS 209FBGA - Trays |
| GS816272CC-150V | 制造商:GSI Technology 功能描述:SRAM SYNC OCTAL 1.8V/2.5V 18MBIT 256KX72 7.5NS/3.8NS 209FBGA - Trays |
| GS816272CC-200 | 制造商:GSI Technology 功能描述:SRAM SYNC OCTAL 2.5V/3.3V 18MBIT 256KX72 6.5NS/3NS 209FBGA - Trays |
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