- 您現在的位置：買賣IC網 > PDF目錄384348 > GS8162Z72CGC-300 (GSI TECHNOLOGY) 18Mb Pipelined and Flow Through Synchronous NBT SRAM PDF資料下載
參數資料
| 型號： | GS8162Z72CGC-300 |
| 廠商： | GSI TECHNOLOGY |
| 元件分類： | DRAM |
| 英文描述： | 18Mb Pipelined and Flow Through Synchronous NBT SRAM |
| 中文描述： | 256K X 72 ZBT SRAM, 5 ns, PBGA209 |
| 封裝： | 14 X 22 MM, 1 MM PITCH, LEAD FREE, BGA-209 |
| 文件頁數： | 1/29頁 |
| 文件大小： | 604K |
| 代理商： | GS8162Z72CGC-300 |
當前第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁
GS8162Z72CC-333/300/250/200/150
18Mb Pipelined and Flow Through
Synchronous NBT SRAM
333 MHz
–
150 MHz
2.5 V or 3.3 V V
DD
2.5 V or 3.3 V I/O
209-Bump BGA
Commercial Temp
Industrial Temp
Preliminary
Rev: 1.01 3/2005
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
1/29
2004, GSI Technology
Features
NBT (No Bus Turn Around) functionality allows zero wait
Read-Write-Read bus utilization; fully pin-compatible with
both pipelined and flow through NtRAM, NoBL and
ZBT SRAMs
2.5 V or 3.3 V +10%/–10% core power supply
2.5 V or 3.3 V I/O supply
User-configurable Pipeline and Flow Through mode
ZQ mode pin for user-selectable high/low output drive
IEEE 1149.1 JTAG-compatible Boundary Scan
On-chip write parity checking; even or odd selectable
On-chip parity encoding and error detection
LBO pin for Linear or Interleave Burst mode
Pin-compatible with 2M, 4M, and 8M devices
Byte write operation (9-bit Bytes)
3 chip enable signals for easy depth expansion
ZZ Pin for automatic power-down
JEDEC-standard 209-Bump BGA package
Pb-Free 209-Bump BGA package available
Functional Description
The GS8162Z72CC is an 18Mbit Synchronous Static SRAM.
GSI's NBT SRAMs, like ZBT, NtRAM, NoBL or other
pipelined read/double late write or flow through read/single
late write SRAMs, allow utilization of all available bus
bandwidth by eliminating the need to insert deselect cycles
when the device is switched from read to write cycles.
Because it is a synchronous device, address, data inputs, and
read/write control inputs are captured on the rising edge of the
input clock. Burst order control (LBO) must be tied to a power
rail for proper operation. Asynchronous inputs include the
Sleep mode enable (ZZ) and Output Enable. Output Enable can
be used to override the synchronous control of the output
drivers and turn the RAM's output drivers off at any time.
Write cycles are internally self-timed and initiated by the rising
edge of the clock input. This feature eliminates complex off-
chip write pulse generation required by asynchronous SRAMs
and simplifies input signal timing.
The GS8162Z72CC may be configured by the user to operate
in Pipeline or Flow Through mode. Operating as a pipelined
synchronous device, in addition to the rising-edge-triggered
registers that capture input signals, the device incorporates a
rising edge triggered output register. For read cycles, pipelined
SRAM output data is temporarily stored by the edge-triggered
output register during the access cycle and then released to the
output drivers at the next rising edge of clock.
The GS8162Z72CC is implemented with GSI's high
performance CMOS technology and is available in a JEDEC-
standard 209-bump BGA package.
Parameter Synopsis
-333
2.8
3.0
-300
2.8
3.3
-250
3.0
4.0
-200
3.0
5.0
-150
3.8
6.7
Unit
ns
ns
Pipeline
3-1-1-1
t
KQ
tCycle
Curr
t
KQ
tCycle
Curr
545
4.5
4.5
380
495
5.0
5.0
345
425
5.5
5.5
315
345
6.5
6.5
275
270
7.5
7.5
250
mA
ns
ns
mA
Flow Through
2-1-1-1
相關PDF資料 |
PDF描述 |
|---|---|
| GS8162Z72CGC-30I | 18Mb Pipelined and Flow Through Synchronous NBT SRAM |
| GS8162Z72CGC-333 | 18Mb Pipelined and Flow Through Synchronous NBT SRAM |
| GS8162Z72CGC-333I | 18Mb Pipelined and Flow Through Synchronous NBT SRAM |
| GS8170DW36C-300I | 18Mb ヒ1x1Dp CMOS I/O Double Late Write SigmaRAM |
| GS8170DW36C | 18Mb ヒ1x1Dp CMOS I/O Double Late Write SigmaRAM |
相關代理商/技術參數 |
參數描述 |
|---|---|
| GS8162Z72CGC-300I | 制造商:GSI Technology 功能描述:SRAM SYNC OCTAL 2.5V/3.3V 18MBIT 256KX72 5NS/2.8NS 209FBGA - Trays |
| GS8170DW36AC-300I | 制造商:GSI Technology 功能描述:SRAM SYNC QUAD 1.8V 18MBIT 512KX36 1.8NS 209FBGA - Trays |
| GS8170DW36AC-350 | 制造商:GSI Technology 功能描述:SRAM SYNC QUAD 1.8V 18MBIT 512KX36 1.7NS 209FBGA - Trays |
| GS8170DW36AC-350I | 制造商:GSI Technology 功能描述:SRAM SYNC QUAD 1.8V 18MBIT 512KX36 1.7NS 209FBGA - Trays |
| GS8170DW36AGC-250 | 制造商:GSI Technology 功能描述:SRAM SYNC QUAD 1.8V 18MBIT 512KX36 2.1NS 209FBGA - Trays |
發布緊急采購，3分鐘左右您將得到回復。