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參數資料

First Write

First Read

Burst Write

Burst Read

Deselect

Notes:

The diagram shows only supported (tested) synchronous state transitions. The diagram presumes G is tied low.

The upper portion of the diagram assumes active use of only the Enable (E1) and Write (B

, B

, BW, and GW) control inputs, and

that ADSP is tied high and ADSC is tied low.

The upper and lower portions of the diagram together assume active use of only the Enable, Write, and ADSC control inputs, and

assumes ADSP is tied high and ADV is tied low.

GS832118/32/36E-xxxV

Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.

Rev: 1.04 6/2006

10/31

2003, GSI Technology

Simplified State Diagram

相關代理商/技術參數	參數描述
GS832136E-200V	制造商:GSI Technology 功能描述:SRAM SYNC QUAD 1.8V/2.5V 36MBIT 1MX36 6.5NS/3NS 165FPBGA - Trays
GS832136E-225	制造商:GSI Technology 功能描述:SRAM SYNC QUAD 2.5V/3.3V 36MBIT 1MX36 6NS/2.7NS 165FBGA - Trays
GS832136E-225I	制造商:GSI Technology 功能描述:SRAM SYNC QUAD 2.5V/3.3V 36MBIT 1MX36 6NS/2.7NS 165FBGA - Trays
GS832136E-225IV	制造商:GSI Technology 功能描述:SRAM SYNC QUAD 1.8V/2.5V 36MBIT 1MX36 6NS/3NS 165FPBGA - Trays
GS832136E-225V	制造商:GSI Technology 功能描述:SRAM SYNC QUAD 1.8V/2.5V 36MBIT 1MX36 6NS/3NS 165FPBGA - Trays

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