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參數資料

First Write

First Read

Burst Write

Burst Read

Deselect

Notes:

The diagram shows supported (tested) synchronous state transitions plus supported transitions that depend upon the use of G.

Use of “Dummy Reads” (Read Cycles with G High) may be used to make the transition from read cycles to write cycles without passing

through a deselect cycle. Dummy read cycles increment the address counter just like normal read cycles.

Transitions shown in gray tone assume G has been pulsed high long enough to turn the RAM’s drivers off and for incoming data to meet

Data Input Set Up Time.

GS832118/32/36E-xxxV

Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.

Rev: 1.04 6/2006

11/31

2003, GSI Technology

Simplified State Diagram with G

相關代理商/技術參數	參數描述
GS832136GE-133	制造商:GSI 制造商全稱:GSI Technology 功能描述:2M x 18, 1M x 32, 1M x 36 36Mb Sync Burst SRAMs
GS832136GE-133I	制造商:GSI 制造商全稱:GSI Technology 功能描述:2M x 18, 1M x 32, 1M x 36 36Mb Sync Burst SRAMs
GS832136GE-133IV	制造商:GSI 制造商全稱:GSI Technology 功能描述:2M x 18, 1M x 32, 1M x 36 36Mb Sync Burst SRAMs
GS832136GE-133V	制造商:GSI 制造商全稱:GSI Technology 功能描述:2M x 18, 1M x 32, 1M x 36 36Mb Sync Burst SRAMs
GS832136GE-150	制造商:GSI 制造商全稱:GSI Technology 功能描述:2M x 18, 1M x 32, 1M x 36 36Mb Sync Burst SRAMs

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