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參數資料
型號: GS8322V36GB-166I
廠商: GSI TECHNOLOGY
元件分類: DRAM
英文描述: 2M x 18, 1M x 36, 512K x 72 36Mb S/DCD Sync Burst SRAMs
中文描述: 1M X 36 CACHE SRAM, 8 ns, PBGA119
封裝: 14 X 22 MM, 1.27 MM PITCH, LEAD FREE, FPBGA-119
文件頁數: 21/42頁
文件大小: 1038K
代理商: GS8322V36GB-166I
AC Electrical Characteristics
Parameter
Symbol
-250
-225
-200
-166
-150
-133
Unit
Min
Max
Min
Max
Min
Max
Min
Max
Min
Max
Min
Max
Pipeline
Clock Cycle Time
tKC
4.0
4.4
5.0
6.0
6.7
7.5
ns
Clock to Output Valid (x18/x36)
tKQ
2.5
2.7
3.0
3.5
3.8
4.0
ns
Clock to Output Valid (x72)
tKQ
3.0
3.0
3.0
3.5
3.8
4.0
ns
Clock to Output Invalid
tKQX
1.5
1.5
1.5
1.5
1.5
1.5
ns
Clock to Output in Low-Z
tLZ
1
1.5
1.5
1.5
1.5
1.5
1.5
ns
Setup time
tS
1.2
1.3
1.4
1.5
1.5
1.5
ns
Hold time
tH
0.2
0.3
0.4
0.5
0.5
0.5
ns
Flow
Through
Clock Cycle Time
tKC
6.5
7.0
7.5
8.0
8.5
8.5
ns
Clock to Output Valid
tKQ
6.5
7.0
7.5
8.0
8.5
8.5
ns
Clock to Output Invalid
tKQX
3.0
3.0
3.0
3.0
3.0
3.0
ns
Clock to Output in Low-Z
tLZ
1
3.0
3.0
3.0
3.0
3.0
3.0
ns
Setup time
tS
1.5
1.5
1.5
1.5
1.5
1.5
ns
Hold time
tH
0.5
0.5
0.5
0.5
0.5
0.5
ns
Clock HIGH Time
tKH
1.3
1.3
1.3
1.3
1.5
1.7
ns
Clock LOW Time
tKL
1.5
1.5
1.5
1.5
1.7
2
ns
Clock to Output in
High-Z (x18/x36)
tHZ
1
1.5
2.5
1.5
2.7
1.5
3.0
1.5
3.0
1.5
3.0
1.5
3.0
ns
Clock to Output in
High-Z (x72)
tHZ
1
1.5
3.0
1.5
3.0
1.5
3.0
1.5
3.0
1.5
3.0
1.5
3.0
ns
G to Output Valid
(x18/x36)
tOE
2.5
2.7
3.0
3.5
3.8
4.0
ns
G to Output Valid
(x72)
tOE
3.0
3.0
3.0
3.5
3.8
4.0
ns
G to output in Low-Z
tOLZ
1
0
0
0
0
0
0
ns
G to output in High-Z (x18/x36)
tOHZ
1
2.5
2.7
3.0
3.0
3.0
3.0
ns
G to output in High-Z (x72)
tOHZ
1
3.0
3.0
3.0
3.0
3.0
3.0
ns
ZZ setup time
tZZS
2
5
5
5
5
5
5
ns
ZZ hold time
tZZH
2
1
1
1
1
1
1
ns
ZZ recovery
tZZR
20
20
20
20
20
20
ns
Preliminary
GS8322V18(B/E)/GS8322V36(B/E)/GS8322V72(C)
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
Rev: 1.04 4/2005
21/42
2003, GSI Technology
Notes:
1.
2.
These parameters are sampled and are not 100% tested.
ZZ is an asynchronous signal. However, in order to be recognized on any given clock cycle, ZZ must meet the specified setup and hold
times as specified above.
相關PDF資料
PDF描述
GS8322V36GB-200 2M x 18, 1M x 36, 512K x 72 36Mb S/DCD Sync Burst SRAMs
GS8322V36GB-200I 2M x 18, 1M x 36, 512K x 72 36Mb S/DCD Sync Burst SRAMs
GS8322V36GB-225 2M x 18, 1M x 36, 512K x 72 36Mb S/DCD Sync Burst SRAMs
GS8322V36GB-225I 2M x 18, 1M x 36, 512K x 72 36Mb S/DCD Sync Burst SRAMs
GS8322V36GB-250 2M x 18, 1M x 36, 512K x 72 36Mb S/DCD Sync Burst SRAMs
相關代理商/技術參數
參數描述
GS8322V72C-133 制造商:GSI Technology 功能描述:SRAM SYNC OCTAL 1.8V 36MBIT 512KX72 8.5NS/4NS 209FBGA - Trays
GS8322V72C-133I 制造商:GSI Technology 功能描述:SRAM SYNC OCTAL 1.8V 36MBIT 512KX72 8.5NS/4NS 209FBGA - Trays
GS8322V72C-150 制造商:GSI Technology 功能描述:SRAM SYNC OCTAL 1.8V 36MBIT 512KX72 8.5NS/3.8NS 209FBGA - Trays
GS8322V72C-150I 制造商:GSI Technology 功能描述:SRAM SYNC OCTAL 1.8V 36MBIT 512KX72 8.5NS/3.8NS 209FBGA - Trays
GS8322V72C-166 制造商:GSI Technology 功能描述:SRAM SYNC OCTAL 1.8V 36MBIT 512KX72 8NS/3.5NS 209FBGA - Trays
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