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參數(shù)資料
型號(hào): GS8322V72C-133
廠(chǎng)商: GSI TECHNOLOGY
元件分類(lèi): DRAM
英文描述: 2M x 18, 1M x 36, 512K x 72 36Mb S/DCD Sync Burst SRAMs
中文描述: 512K X 72 CACHE SRAM, 8.5 ns, PBGA209
封裝: 14 X 22 MM, 1 MM PITCH, BGA-209
文件頁(yè)數(shù): 18/42頁(yè)
文件大小: 1038K
代理商: GS8322V72C-133
Preliminary
GS8322V18(B/E)/GS8322V36(B/E)/GS8322V72(C)
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
Rev: 1.04 4/2005
18/42
2003, GSI Technology
Logic Levels
Parameter
Symbol
Min.
Typ.
Max.
Unit
Notes
V
DD
Input High Voltage
V
IH
0.6*V
DD
V
DD
+ 0.3
V
1
V
DD
Input Low Voltage
V
IL
0.3
0.3*V
DD
V
1
V
DDQ
I/O Input High Voltage
V
IHQ
0.6*V
DD
V
DDQ
+ 0.3
V
1,3
V
DDQ
I/O Input Low Voltage
V
ILQ
0.3
0.3*V
DD
V
1,3
Notes:
1.
The part numbers of Industrial Temperature Range versions end the character “I”. Unless otherwise noted, all performance specifica-
tions quoted are evaluated for worst case in the temperature range marked on the device.
Input Under/overshoot voltage must be
2 V > Vi < V
DDn
+2 V not to exceed 3.6 V maximum, with a pulse width not to exceed 20% tKC.
V
IHQ
(max) is voltage on V
DDQ
pins plus 0.3 V.
2.
3.
20% tKC
V
SS
2.0 V
50%
V
SS
V
IH
Undershoot Measurement and Timing
Overshoot Measurement and Timing
20% tKC
V
DD
+ 2.0 V
50%
V
DD
V
IL
Capacitance
(T
A
= 25
o
C, f = 1 MH
Z
, V
DD
Parameter
Symbol
C
IN
C
I/O
Test conditions
V
IN
= 0 V
V
OUT
= 0 V
Typ.
Max.
Unit
Input Capacitance
4
5
pF
Input/Output Capacitance
6
7
pF
Note:
These parameters are sample tested.
= 2.5 V)
相關(guān)PDF資料
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
GS8322V72C-133I 制造商:GSI Technology 功能描述:SRAM SYNC OCTAL 1.8V 36MBIT 512KX72 8.5NS/4NS 209FBGA - Trays
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GS8322V72C-150I 制造商:GSI Technology 功能描述:SRAM SYNC OCTAL 1.8V 36MBIT 512KX72 8.5NS/3.8NS 209FBGA - Trays
GS8322V72C-166 制造商:GSI Technology 功能描述:SRAM SYNC OCTAL 1.8V 36MBIT 512KX72 8NS/3.5NS 209FBGA - Trays
GS8322V72C-166I 制造商:GSI Technology 功能描述:SRAM SYNC OCTAL 1.8V 36MBIT 512KX72 8NS/3.5NS 209FBGA - Trays
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