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參數資料
型號: GS8322ZV18B-200
廠商: GSI TECHNOLOGY
元件分類: DRAM
英文描述: 36Mb Pipelined and Flow Through Synchronous NBT SRAM
中文描述: 2M X 18 ZBT SRAM, 7.5 ns, PBGA119
封裝: 14 X 22 MM, 1.27 PITCH, FPBGA-119
文件頁數: 18/39頁
文件大?。?/td> 975K
代理商: GS8322ZV18B-200
Absolute Maximum Ratings
(All voltages reference to V
SS
)
Symbol
Description
Value
Unit
V
DD
Voltage on V
DD
Pins
0.5 to 3.6
V
V
DDQ
Voltage in V
DDQ
Pins
0.5 to 3.6
V
V
I/O
Voltage on I/O Pins
0.5 to V
DDQ
+0.5 (
3.6 V max.)
0.5 to V
DD
+0.5 (
3.6 V max.)
V
V
IN
Voltage on Other Input Pins
V
I
IN
Input Current on Any Pin
+/
20
mA
I
OUT
Output Current on Any I/O Pin
+/
20
mA
P
D
Package Power Dissipation
1.5
W
T
STG
Storage Temperature
55 to 125
o
C
T
BIAS
Temperature Under Bias
55 to 125
o
C
GS8322ZV18(B/E)/GS8322ZV36(B/E)/GS8322ZV72(C)
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
Rev: 1.03a 2/2006
18/39
2002, GSI Technology
Note:
Permanent damage to the device may occur if the Absolute Maximum Ratings are exceeded. Operation should be restricted to Recommended
Operating Conditions. Exposure to conditions exceeding the Absolute Maximum Ratings, for an extended period of time, may affect reliability of
this component.
Power Supply Voltage Ranges
Parameter
Symbol
Min.
Typ.
Max.
Unit
Notes
1.8 V Supply Voltage
V
DD
1.6
1.8
2.0
V
1.8 V V
DDQ
I/O Supply Voltage
V
DDQ
1.6
1.8
2.0
V
Notes:
1.
The part numbers of Industrial Temperature Range versions end the character “I”. Unless otherwise noted, all performance specifica-
tions quoted are evaluated for worst case in the temperature range marked on the device.
Input Under/overshoot voltage must be
2 V > Vi < V
DDn
+2 V not to exceed 3.6 V maximum, with a pulse width not to exceed 20% tKC.
2.
Recommended Operating Temperatures
Parameter
Symbol
Min.
Typ.
Max.
Unit
Notes
Ambient Temperature (Commercial Range Versions)
T
A
0
25
70
°
C
2
Ambient Temperature (Industrial Range Versions)
T
A
40
25
85
°
C
2
Notes:
1.
The part numbers of Industrial Temperature Range versions end the character “I”. Unless otherwise noted, all performance specifica-
tions quoted are evaluated for worst case in the temperature range marked on the device.
Input Under/overshoot voltage must be
2 V > Vi < V
DDn
+2 V not to exceed 3.6 V maximum, with a pulse width not to exceed 20% tKC.
2.
相關PDF資料
PDF描述
GS8322ZV18B-200I 36Mb Pipelined and Flow Through Synchronous NBT SRAM
GS8322ZV18B-225 36Mb Pipelined and Flow Through Synchronous NBT SRAM
GS8322ZV18B-225I 36Mb Pipelined and Flow Through Synchronous NBT SRAM
GS8322ZV18B-250 36Mb Pipelined and Flow Through Synchronous NBT SRAM
GS8322ZV18B-250I 36Mb Pipelined and Flow Through Synchronous NBT SRAM
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參數描述
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