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參數資料
型號: GS8322ZV72C-250
廠商: GSI TECHNOLOGY
元件分類: DRAM
英文描述: 36Mb Pipelined and Flow Through Synchronous NBT SRAM
中文描述: 512K X 72 ZBT SRAM, 6.5 ns, PBGA209
封裝: 14 X 22 MM, 1 MM PITCH, BGA-209
文件頁數: 27/39頁
文件大小: 975K
代理商: GS8322ZV72C-250
ID Register Contents
Die
Revision
Code
Not Used
I/O
Configuration
GSI Technology
JEDEC Vendor
ID Code
P
Bit #
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1
0
x72
X
X
X
X
0
0
0
0
0
0
0
0
0
0
0
0
1
0
0
1
0
0
0 1 1 0 1 1 0 0 1
1
x36
X
X
X
X
0
0
0
0
0
0
0
0
0
0
0
0
1
0
0
0
0
0
0 1 1 0 1 1 0 0 1
1
x32
X
X
X
X
0
0
0
0
0
0
0
0
0
0
0
0
1
1
0
0
0
0
0 1 1 0 1 1 0 0 1
1
x18
X
X
X
X
0
0
0
0
0
0
0
0
0
0
0
0
1
0
1
0
0
0
0 1 1 0 1 1 0 0 1
1
x16
X
X
X
X
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
0
0
0
0 1 1 0 1 1 0 0 1
1
GS8322ZV18(B/E)/GS8322ZV36(B/E)/GS8322ZV72(C)
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
Rev: 1.03a 2/2006
27/39
2002, GSI Technology
Tap Controller Instruction Set
Overview
There are two classes of instructions defined in the Standard 1149.1-1990; the standard (Public) instructions, and device specific
(Private) instructions. Some Public instructions are mandatory for 1149.1 compliance. Optional Public instructions must be
implemented in prescribed ways. The TAP on this device may be used to monitor all input and I/O pads, and can be used to load
address, data or control signals into the RAM or to preload the I/O buffers.
When the TAP controller is placed in Capture-IR state the two least significant bits of the instruction register are loaded with 01.
When the controller is moved to the Shift-IR state the Instruction Register is placed between TDI and TDO. In this state the desired
instruction is serially loaded through the TDI input (while the previous contents are shifted out at TDO). For all instructions, the
TAP executes newly loaded instructions only when the controller is moved to Update-IR state. The TAP instruction set for this
device is listed in the following table.
相關PDF資料
PDF描述
GS8322ZV72C-250I 36Mb Pipelined and Flow Through Synchronous NBT SRAM
GS8322ZV72GC-133 36Mb Pipelined and Flow Through Synchronous NBT SRAM
GS8322ZV72GC-133I 36Mb Pipelined and Flow Through Synchronous NBT SRAM
GS8322ZV72GC-150 36Mb Pipelined and Flow Through Synchronous NBT SRAM
GS8322ZV72GC-150I 36Mb Pipelined and Flow Through Synchronous NBT SRAM
相關代理商/技術參數
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