- 您現在的位置：買賣IC網 > PDF目錄385321 > GS8322ZV72GC-250I (GSI TECHNOLOGY) 36Mb Pipelined and Flow Through Synchronous NBT SRAM PDF資料下載
參數資料
| 型號： | GS8322ZV72GC-250I |
| 廠商： | GSI TECHNOLOGY |
| 元件分類： | DRAM |
| 英文描述： | 36Mb Pipelined and Flow Through Synchronous NBT SRAM |
| 中文描述： | 512K X 72 ZBT SRAM, 6.5 ns, PBGA209 |
| 封裝： | 14 X 22 MM, 1 MM PITCH, LEAD FREE, BGA-209 |
| 文件頁數： | 1/39頁 |
| 文件大小： | 975K |
| 代理商： | GS8322ZV72GC-250I |
當前第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁
GS8322ZV18(B/E)/GS8322ZV36(B/E)/GS8322ZV72(C)
36Mb Pipelined and Flow Through
Synchronous NBT SRAM
250 MHz
–
133 MHz
1.8 V V
DD
1.8 V I/O
119, 165 & 209 BGA
Commercial Temp
Industrial Temp
Rev: 1.03a 2/2006
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
1/39
2002, GSI Technology
Features
NBT (No Bus Turn Around) functionality allows zero wait
Read-Write-Read bus utilization; fully pin-compatible with
both pipelined and flow through NtRAM, NoBL and
ZBT SRAMs
1.8 V +10%/–10% core power supply
1.8 V I/O supply
User-configurable Pipeline and Flow Through mode
ZQ mode pin for user-selectable high/low output drive
IEEE 1149.1 JTAG-compatible Boundary Scan
LBO pin for Linear or Interleave Burst mode
Pin-compatible with 2Mb, 4Mb, 8Mb, and 16Mb devices
Byte write operation (9-bit Bytes)
3 chip enable signals for easy depth expansion
ZZ Pin for automatic power-down
JEDEC-standard 119-, 165- or 209-Bump BGA package
Pb-Free packages available
Functional Description
The GS8322ZV18/36/72 is a 36Mbit Synchronous Static
SRAM. GSI's NBT SRAMs, like ZBT, NtRAM, NoBL or
other pipelined read/double late write or flow through read/
single late write SRAMs, allow utilization of all available bus
bandwidth by eliminating the need to insert deselect cycles
when the device is switched from read to write cycles.
Because it is a synchronous device, address, data inputs, and
read/write control inputs are captured on the rising edge of the
input clock. Burst order control (LBO) must be tied to a power
rail for proper operation. Asynchronous inputs include the
Sleep mode enable (ZZ) and Output Enable. Output Enable can
be used to override the synchronous control of the output
drivers and turn the RAM's output drivers off at any time.
Write cycles are internally self-timed and initiated by the rising
edge of the clock input. This feature eliminates complex off-
chip write pulse generation required by asynchronous SRAMs
and simplifies input signal timing.
The GS8322ZV18/36/72 may be configured by the user to
operate in Pipeline or Flow Through mode. Operating as a
pipelined synchronous device, in addition to the rising-edge-
triggered registers that capture input signals, the device
incorporates a rising edge triggered output register. For read
cycles, pipelined SRAM output data is temporarily stored by
the edge-triggered output register during the access cycle and
then released to the output drivers at the next rising edge of
clock.
The GS8322ZV18/36/72 is implemented with GSI's high
performance CMOS technology and is available in a JEDEC-
standard 119-bump, 165-bump or 209-bump BGA package.
Parameter Synopsis
-250 -225 -200 -166 -150 -133 Unit
2.5
3.0
4.0
4.4
5.0
6.0
Pipeline
3-1-1-1
t
KQ(x18/x36)
t
KQ(x72)
tCycle
Curr
(x18)
Curr
(x36)
Curr
(x72)
t
KQ
tCycle
Curr
(x18)
Curr
(x36)
Curr
(x72)
2.7
3.0
3.0
3.0
3.5
3.5
3.8
3.8
6.7
4.0
4.0
7.5
ns
ns
ns
285
350
440
6.5
6.5
205
235
315
265
320
410
7.0
7.0
195
225
295
245
295
370
7.5
7.5
185
210
265
220
260
320
8.0
8.0
175
200
255
210
240
300
8.5
8.5
165
190
240
185
215
265
8.5
8.5
155
175
230
mA
mA
mA
ns
ns
mA
mA
mA
Flow
Through
2-1-1-1
相關PDF資料 |
PDF描述 |
|---|---|
| GS8322ZV18E-166 | 36Mb Pipelined and Flow Through Synchronous NBT SRAM |
| GS8322ZV18E-166I | 36Mb Pipelined and Flow Through Synchronous NBT SRAM |
| GS8322ZV18E-200 | 36Mb Pipelined and Flow Through Synchronous NBT SRAM |
| GS8322ZV18E-200I | 36Mb Pipelined and Flow Through Synchronous NBT SRAM |
| GS8322ZV18E-225 | 36Mb Pipelined and Flow Through Synchronous NBT SRAM |
相關代理商/技術參數 |
參數描述 |
|---|---|
| GS8324Z36B-133 | 制造商:GSI Technology 功能描述:SRAM SYNC QUAD 2.5V/3.3V 36MBIT 1MX36 10NS/4NS 119FBGA - Trays |
| GS8324Z36B-200I | 制造商:GSI Technology 功能描述:SRAM SYNC QUAD 2.5V/3.3V 36MBIT 1MX36 7.5NS/3NS 119FBGA - Trays |
| GS8324Z72C200 | 制造商:G.S.I. 功能描述: |
| GS8342D06BD-350 | 制造商:GSI Technology 功能描述:165 FBGA - Bulk |
| GS8342D06BD-500 | 制造商:GSI Technology 功能描述:165 FBGA - Bulk |
發布緊急采購，3分鐘左右您將得到回復。