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參數(shù)資料

First Write

First Read

Burst Write

Burst Read

Deselect

Notes:

The diagram shows only supported (tested) synchronous state transitions. The diagram presumes G is tied low.

The upper portion of the diagram assumes active use of only the Enable (E1, E2, and E3) and Write (B

, B

, BW, and GW)

control inputs, and that ADSP is tied high and ADSC is tied low.

The upper and lower portions of the diagram together assume active use of only the Enable, Write, and ADSC control inputs, and

assumes ADSP is tied high and ADV is tied low.

GS864018/32/36T-xxxV

Preliminary

Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.

Rev: 1.01 6/2006

10/23

2004, GSI Technology

Simplified State Diagram

相關(guān)代理商/技術(shù)參數(shù)	參數(shù)描述
GS864018T-167V	制造商:GSI 制造商全稱:GSI Technology 功能描述:4M x 18, 2M x 32, 2M x 36 72Mb Sync Burst SRAMs
GS864018T-200	制造商:GSI 制造商全稱:GSI Technology 功能描述:4M x 18, 2M x 32, 2M x 36 72Mb Sync Burst SRAMs
GS864018T-200I	制造商:GSI 制造商全稱:GSI Technology 功能描述:4M x 18, 2M x 32, 2M x 36 72Mb Sync Burst SRAMs
GS864018T-200IV	制造商:GSI 制造商全稱:GSI Technology 功能描述:4M x 18, 2M x 32, 2M x 36 72Mb Sync Burst SRAMs
GS864018T-200V	制造商:GSI 制造商全稱:GSI Technology 功能描述:4M x 18, 2M x 32, 2M x 36 72Mb Sync Burst SRAMs

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