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參數資料
| 型號： | GS8640E32GT-167IV |
| 廠商： | GSI TECHNOLOGY |
| 元件分類： | DRAM |
| 英文描述： | 4M x 18, 2M x 32, 2M x 36 72Mb Sync Burst SRAMs |
| 中文描述： | 2M X 32 CACHE SRAM, 8 ns, PQFP100 |
| 封裝： | ROHS COMPLIANT, TQFP-100 |
| 文件頁數： | 10/23頁 |
| 文件大?。?/td> | 601K |
| 代理商： | GS8640E32GT-167IV |
First Write
First Read
Burst Write
Burst Read
Deselect
R
W
CR
CW
X
X
W
R
R
W
R
X
X
X
S
S
CR
R
CW
CR
CR
Notes:
1.
2.
The diagram shows only supported (tested) synchronous state transitions. The diagram presumes G is tied low.
The upper portion of the diagram assumes active use of only the Enable (E1) and Write (B
A
, B
B
, B
C
, B
D
, BW, and GW) control inputs, and
that ADSP is tied high and ADSC is tied low.
The upper and lower portions of the diagram together assume active use of only the Enable, Write, and ADSC control inputs, and
assumes ADSP is tied high and ADV is tied low.
3.
GS8640E18/32/36T-xxxV
Preliminary
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
Rev: 1.01 6/2006
10/23
2004, GSI Technology
Simplified State Diagram
相關PDF資料 |
PDF描述 |
|---|---|
| GS8640E32GT-167V | 4M x 18, 2M x 32, 2M x 36 72Mb Sync Burst SRAMs |
| GS8640E32GT-200IV | 4M x 18, 2M x 32, 2M x 36 72Mb Sync Burst SRAMs |
| GS8640E32GT-200V | 4M x 18, 2M x 32, 2M x 36 72Mb Sync Burst SRAMs |
| GS8640E32GT-250IV | 4M x 18, 2M x 32, 2M x 36 72Mb Sync Burst SRAMs |
| GS8640E32T-167IV | 4M x 18, 2M x 32, 2M x 36 72Mb Sync Burst SRAMs |
相關代理商/技術參數 |
參數描述 |
|---|---|
| GS8640E32GT-167V | 制造商:GSI 制造商全稱:GSI Technology 功能描述:4M x 18, 2M x 32, 2M x 36 72Mb Sync Burst SRAMs |
| GS8640E32GT-200IV | 制造商:GSI 制造商全稱:GSI Technology 功能描述:4M x 18, 2M x 32, 2M x 36 72Mb Sync Burst SRAMs |
| GS8640E32GT-200V | 制造商:GSI 制造商全稱:GSI Technology 功能描述:4M x 18, 2M x 32, 2M x 36 72Mb Sync Burst SRAMs |
| GS8640E32GT-250IV | 制造商:GSI 制造商全稱:GSI Technology 功能描述:4M x 18, 2M x 32, 2M x 36 72Mb Sync Burst SRAMs |
| GS8640E32GT-250V | 制造商:GSI 制造商全稱:GSI Technology 功能描述:4M x 18, 2M x 32, 2M x 36 72Mb Sync Burst SRAMs |
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