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參數(shù)資料
型號(hào)： GS864272C-167V
廠商： GSI TECHNOLOGY
元件分類： DRAM
英文描述： 4M x 18, 2M x 36, 1M x 72 72Mb S/DCD Sync Burst SRAMs
中文描述： 1M X 72 CACHE SRAM, 8 ns, PBGA209
封裝： 14 X 22 MM, 1 MM PITCH, BGA-209
文件頁(yè)數(shù)： 11/35頁(yè)
文件大小： 934K
代理商： GS864272C-167V
Synchronous Truth Table
Operation
Address
Used
State
Diagram
Key
5
X
X
X
R
R
W
CR
CR
CW
CW
E
1
E
2
ADSP
ADSC
ADV
W
3
DQ
4
Deselect Cycle, Power Down
Deselect Cycle, Power Down
Deselect Cycle, Power Down
Read Cycle, Begin Burst
Read Cycle, Begin Burst
Write Cycle, Begin Burst
Read Cycle, Continue Burst
Read Cycle, Continue Burst
Write Cycle, Continue Burst
Write Cycle, Continue Burst
Read Cycle, Suspend Burst
Read Cycle, Suspend Burst
Write Cycle, Suspend Burst
Write Cycle, Suspend Burst
Notes:
1.
X = Don’t Care, H = High, L = Low
2.
E = T (True) if E
2
= 1 and E
3
= 0; E = F (False) if E
2
= 0 or E
3
= 1
3.
W = T (True) and F (False) is defined in the Byte Write Truth Table preceding.
4.
G is an asynchronous input. G can be driven high at any time to disable active output drivers. G low can only enable active drivers (shown
as “Q” in the Truth Table above).
5.
All input combinations shown above are tested and supported. Input combinations shown in gray boxes need not be used to accomplish
basic synchronous or synchronous burst operations and may be avoided for simplicity.
6.
Tying ADSP high and ADSC low allows simple non-burst synchronous operations. See
BOLD
items above.
7.
Tying ADSP high and ADV low while using ADSC to load new addresses allows simple burst operations. See
ITALIC
items above.
None
None
None
External
External
External
Next
Next
Next
Next
Current
Current
Current
Current
H
L
L
L
L
L
X
H
X
H
X
H
X
H
X
F
F
T
T
T
X
X
X
X
X
X
X
X
X
L
H
L
H
H
H
X
H
X
H
X
H
X
L
X
L
X
L
L
H
H
H
H
H
H
H
H
X
X
X
X
X
X
L
L
L
L
H
H
H
H
X
X
X
X
F
T
F
F
T
T
F
F
T
T
High-Z
High-Z
High-Z
Q
Q
D
Q
Q
D
D
Q
Q
D
D
Preliminary
GS864218/36/72(B/C)-xxxV
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
Rev: 1.03 6/2006
11/35
2004, GSI Technology
相關(guān)PDF資料
PDF描述
GS864272C-200IV 4M x 18, 2M x 36, 1M x 72 72Mb S/DCD Sync Burst SRAMs
GS864272C-200V 4M x 18, 2M x 36, 1M x 72 72Mb S/DCD Sync Burst SRAMs
GS864272C-250IV 4M x 18, 2M x 36, 1M x 72 72Mb S/DCD Sync Burst SRAMs
GS864272C-250V 4M x 18, 2M x 36, 1M x 72 72Mb S/DCD Sync Burst SRAMs
GS864272GC-167IV 4M x 18, 2M x 36, 1M x 72 72Mb S/DCD Sync Burst SRAMs
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
GS864272C-200 制造商:GSI Technology 功能描述:SRAM SYNC OCTAL 2.5V/3.3V 72MBIT 1MX72 7.5NS/3NS 209FBGA - Trays
GS864272C-200IV 制造商:GSI Technology 功能描述:SRAM SYNC DUAL 1.8V/2.5V 72MBIT 1MX72 7.5NS/3NS 209BGA - Bulk
GS864272C-200V 制造商:GSI Technology 功能描述:SRAM SYNC DUAL 1.8V/2.5V 72MBIT 1MX72 7.5NS/3NS 209BGA - Bulk
GS864272C-250 制造商:GSI Technology 功能描述:SRAM SYNC OCTAL 2.5V/3.3V 72MBIT 1MX72 6.5NS/3NS 209FBGA - Trays
GS864272C-250I 制造商:GSI Technology 功能描述:SRAM SYNC OCTAL 2.5V/3.3V 72MBIT 1MX72 6.5NS/3NS 209FBGA - Trays
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