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參數資料
| 型號： | GS8644ZV36E-225 |
| 廠商： | GSI TECHNOLOGY |
| 元件分類： | DRAM |
| 英文描述： | 72Mb Pipelined and Flow Through Synchronous NBT SRAM |
| 中文描述： | 2M X 36 ZBT SRAM, 6.5 ns, PBGA165 |
| 封裝： | 15 X 17 MM, 1 MM PITCH, FBGA-165 |
| 文件頁數： | 14/37頁 |
| 文件大小： | 776K |
| 代理商： | GS8644ZV36E-225 |
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GS8644ZV18(B/E)/GS8644ZV36(B/E)/GS8644ZV72(C)
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
Rev: 1.03 11/2004
14/37
2003, GSI Technology
Pipeline Mode Data I/O State Diagram
Intermediate
Intermediate
Intermediate
Intermediate
Intermediate
Intermediate
High Z
(Data In)
Data Out
(Q Valid)
High Z
B W
B
R
B
D
R
W
R
W
D
D
Current State (n)
Next State (n+2)
Transition
Input Command Code
Key
Transition
Intermediate State (N+1)
Notes
1. The Hold command (CKE Low) is not
shown because it prevents any state change.
2. W, R, B, and D represent input command
codes as indicated in the Truth Tables.
Clock (CK)
Command
Current State
Intermediate
State
n
n+1
n+2
n+3
Current State and Next State Definition for
Pipeline Mode Data I/O State Diagram
Next State
相關PDF資料 |
PDF描述 |
|---|---|
| GS8644ZV36E-225I | 72Mb Pipelined and Flow Through Synchronous NBT SRAM |
| GS8644ZV36E-250 | 72Mb Pipelined and Flow Through Synchronous NBT SRAM |
| GS8644ZV36E-250I | 72Mb Pipelined and Flow Through Synchronous NBT SRAM |
| GS8644ZV72C-133 | 72Mb Pipelined and Flow Through Synchronous NBT SRAM |
| GS8644ZV72C-133I | 72Mb Pipelined and Flow Through Synchronous NBT SRAM |
相關代理商/技術參數 |
參數描述 |
|---|---|
| GS8644ZV36E-225I | 制造商:GSI Technology 功能描述:SRAM SYNC QUAD 1.8V 72MBIT 2MX36 6.5NS/2.5NS 165FBGA - Trays |
| GS8644ZV36E-250 | 制造商:GSI Technology 功能描述:SRAM SYNC QUAD 1.8V 72MBIT 2MX36 6.5NS/2.3NS 165FBGA - Trays |
| GS8644ZV36E-250I | 制造商:GSI Technology 功能描述:SRAM SYNC QUAD 1.8V 72MBIT 2MX36 6.5NS/2.3NS 165FBGA - Trays |
| GS8644ZV72C-133 | 制造商:GSI Technology 功能描述:SRAM SYNC OCTAL 1.8V 72MBIT 1MX72 8.5NS/3.5NS 209FBGA - Trays |
| GS8644ZV72C-133I | 制造商:GSI 制造商全稱:GSI Technology 功能描述:72Mb Pipelined and Flow Through Synchronous NBT SRAM |
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