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參數(shù)資料
| 型號(hào)： | GS8662Q36GE-300 |
| 廠商： | GSI TECHNOLOGY |
| 元件分類： | DRAM |
| 英文描述： | 72Mb SigmaQuad-II Burst of 2 SRAM |
| 中文描述： | 2M X 36 STANDARD SRAM, 0.45 ns, PBGA165 |
| 封裝： | 15 X17 MM, 1 MM PITCH, ROHS COMPLIANT, FPBGA-165 |
| 文件頁(yè)數(shù)： | 16/35頁(yè) |
| 文件大小： | 993K |
| 代理商： | GS8662Q36GE-300 |
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Preliminary
GS8662Q08/09/18/36E-300/250/200/167
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
Rev: 1.01 9/2005
16/35
2005, GSI Technology
State Diagram
Power-Up
Read NOP
Load New
Read Address
DDR Read
Write NOP
Load New
Write Address
DDR Write
WRITE
READ
READ
WRITE
READ
WRITE
Always
(Fixed)
Always
(Fixed)
READ
WRITE
Notes:
1.
2.
Internal burst counter is fixed as 1-bit linear (i.e., when first address is A0+), next internal burst address is A0+1.
“READ” refers to read active status with R = Low, “READ” refers to read inactive status with R = High. The same is
true for “WRITE” and “WRITE”.
Read and write state machine can be active simultaneously.
State machine control timing sequence is controlled by K.
3.
4.
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PDF描述 |
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| GS8662Q36GE-300I | 72Mb SigmaQuad-II Burst of 2 SRAM |
| GS8662R08E-333I | 72Mb SigmaCIO DDR-II Burst of 4 SRAM |
| GS8662R09GE-167 | 72Mb SigmaCIO DDR-II Burst of 4 SRAM |
| GS8662R09GE-167I | 72Mb SigmaCIO DDR-II Burst of 4 SRAM |
| GS8662R09GE-200 | 72Mb SigmaCIO DDR-II Burst of 4 SRAM |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| GS8662Q36GE-300I | 制造商:GSI 制造商全稱:GSI Technology 功能描述:72Mb SigmaQuad-II Burst of 2 SRAM |
| GS8662R08BD-167 | 制造商:GSI Technology 功能描述:GS8662R08BD-167 - Trays |
| GS8662R08BD-200 | 制造商:GSI Technology 功能描述:GS8662R08BD-200 - Trays |
| GS8662R08BD-200I | 制造商:GSI Technology 功能描述:GS8662R08BD-200I - Trays |
| GS8662R08E | 制造商:GSI 制造商全稱:GSI Technology 功能描述:72Mb SigmaCIO DDR-II Burst of 4 SRAM |
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