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參數(shù)資料
| 型號(hào)： | GS8662R09GE-333 |
| 廠商： | GSI TECHNOLOGY |
| 元件分類： | DRAM |
| 英文描述： | 72Mb SigmaCIO DDR-II Burst of 4 SRAM |
| 中文描述： | 8M X 9 DDR SRAM, 0.45 ns, PBGA165 |
| 封裝： | 15 MM X 17 MM, 1 MM PITCH, ROHS COMPLIANT, FPBGA-165 |
| 文件頁(yè)數(shù)： | 15/37頁(yè) |
| 文件大小： | 942K |
| 代理商： | GS8662R09GE-333 |
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Preliminary
GS8662R08/09/18/36E-333/300/250/200/167
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
Rev: 1.01 9/2005
15/37
2005, GSI Technology
B4 State Diagram
Power-Up
NOP
Load New
Address
DDR Read
DDR Write
LOAD
READ
WRITE
LOAD
LOAD
LOAD
LOAD
Notes:
1.
2.
3.
The internal burst address counter is a 4-bit linear counter (i.e., when first address is A0, next internal burst address is A0+1).
“READ” refers to read active status with R/W = High, “WRITE” refers to write inactive status with R/W = Low.
“LOAD” refers to read new address active status with LD = Low, “LOAD” refers to read new address inactive status with LD = High.
LOAD
Increment
Read Address
Increment
Write Address
Always
Always
READ
WRITE
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| GS8662R09GE-333I | 72Mb SigmaCIO DDR-II Burst of 4 SRAM |
| GS8662R18E-167 | 72Mb SigmaCIO DDR-II Burst of 4 SRAM |
| GS8662R18E-167I | 72Mb SigmaCIO DDR-II Burst of 4 SRAM |
| GS8662R18E-200 | 72Mb SigmaCIO DDR-II Burst of 4 SRAM |
| GS8662R18E-200I | 72Mb SigmaCIO DDR-II Burst of 4 SRAM |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| GS8662R09GE-333I | 制造商:GSI 制造商全稱:GSI Technology 功能描述:72Mb SigmaCIO DDR-II Burst of 4 SRAM |
| GS8662R18BD-300 | 制造商:GSI Technology 功能描述:165 FBGA - Bulk |
| GS8662R18BD-350 | 制造商:GSI Technology 功能描述:165 FBGA - Bulk |
| GS8662R18E-167 | 制造商:GSI 制造商全稱:GSI Technology 功能描述:72Mb SigmaCIO DDR-II Burst of 4 SRAM |
| GS8662R18E-167I | 制造商:GSI 制造商全稱:GSI Technology 功能描述:72Mb SigmaCIO DDR-II Burst of 4 SRAM |
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