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參數資料
型號: GS88218BB-150
廠商: GSI TECHNOLOGY
元件分類: DRAM
英文描述: 512K x 18, 256K x 36 9Mb SCD/DCD Sync Burst SRAMs
中文描述: 512K X 18 CACHE SRAM, 7.5 ns, PBGA119
封裝: FPBGA-119
文件頁數: 26/37頁
文件大小: 751K
代理商: GS88218BB-150
GS88218/36BB/D-333/300/250/200/150
Rev: 1.02 10/2004
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
26/37
2002, GSI Technology
JTAG TAP Block Diagram
Identification (ID) Register
The ID Register is a 32-bit register that is loaded with a device and vendor specific 32-bit code when the controller is put in
Capture-DR state with the IDCODE command loaded in the Instruction Register. The code is loaded from a 32-bit on-chip ROM.
It describes various attributes of the RAM as indicated below. The register is then placed between the TDI and TDO pins when the
controller is moved into Shift-DR state. Bit 0 in the register is the LSB and the first to reach TDO when shifting begins.
Instruction Register
ID Code Register
·
31 30 29
Boundary Scan Register
0
1
2
0
· · ·
1
2
0
Bypass Register
TDI
TDO
TMS
TCK
Test Access Port (TAP) Controller
1
·
1
0
·
·
·
·
·
·
·
·
·
Control Signals
·
相關PDF資料
PDF描述
GS88218BB-150I 512K x 18, 256K x 36 9Mb SCD/DCD Sync Burst SRAMs
GS88236BD-150 512K x 18, 256K x 36 9Mb SCD/DCD Sync Burst SRAMs
GS88236BD-150I 512K x 18, 256K x 36 9Mb SCD/DCD Sync Burst SRAMs
GS88236BD-200 512K x 18, 256K x 36 9Mb SCD/DCD Sync Burst SRAMs
GS88236BD-200I 512K x 18, 256K x 36 9Mb SCD/DCD Sync Burst SRAMs
相關代理商/技術參數
參數描述
GS88218CB-200 制造商:GSI Technology 功能描述:SRAM SYNC DUAL 2.5V/3.3V 9MBIT 512KX18 6.5NS/3NS 119FPBGA - Trays
GS88218CB-200I 制造商:GSI Technology 功能描述:SRAM SYNC DUAL 2.5V/3.3V 9MBIT 512KX18 6.5NS/3NS 119FPBGA - Trays
GS88218CB-200IV 制造商:GSI Technology 功能描述:SRAM SYNC DUAL 1.8V/2.5V 9MBIT 512KX18 6.5NS/3NS 119FPBGA - Trays
GS88218CB-200V 制造商:GSI Technology 功能描述:SRAM SYNC DUAL 1.8V/2.5V 9MBIT 512KX18 6.5NS/3NS 119FPBGA - Trays
GS88218CB-250 制造商:GSI Technology 功能描述:SRAM SYNC DUAL 2.5V/3.3V 9MBIT 512KX18 5.5NS/2.5NS 119FPBGA - Trays
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