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| 型號(hào)： | GS88218BD-333 |
| 廠商： | GSI TECHNOLOGY |
| 元件分類： | DRAM |
| 英文描述： | 512K x 18, 256K x 36 9Mb SCD/DCD Sync Burst SRAMs |
| 中文描述： | 512K X 18 CACHE SRAM, 4.5 ns, PBGA165 |
| 封裝： | 13 X 15 MM, 1 MM PITCH, FPBGA-165 |
| 文件頁(yè)數(shù)： | 23/37頁(yè) |
| 文件大小： | 751K |
| 代理商： | GS88218BD-333 |
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GS88218/36BB/D-333/300/250/200/150
Rev: 1.02 10/2004
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
23/37
2002, GSI Technology
Flow Through Mode Timing (DCD)
Sleep Mode
During normal operation, ZZ must be pulled low, either by the user or by it’s internal pull down resistor. When ZZ is pulled high,
the SRAM will enter a Power Sleep mode after 2 cycles. At this time, internal state of the SRAM is preserved. When ZZ returns to
low, the SRAM operates normally after ZZ recovery time.
Begin
Read A
Cont
Deselect Write B
Read C
Read C+1 Read C+2 Read C+3 Read C
Deselect
tHZ
tKQX
tLZ
tH
tS
tOHZ
tOE
tKQ
tH
tS
tH
tS
tH
tS
tH
tS
tH
tS
tH
tS
tH
tS
tH
tS
tH
tS
ADSC initiated read
tS
tH
tS
tKC
tKL
tKH
A
B
C
Q(A)
D(B)
Q(C)
Q(C+1)
Q(C+2)
Q(C+3)
Q(C)
E2 and E3 only sampled with ADSP and ADSC
E1 masks ADSP
Deselected with E1
E1 masks ADSP
Fixed High
CK
ADSP
ADSC
ADV
Ao–An
GW
BW
Ba–Bd
E1
E2
E3
G
DQa–DQd
相關(guān)PDF資料 |
PDF描述 |
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| GS88236BB-150I | 512K x 18, 256K x 36 9Mb SCD/DCD Sync Burst SRAMs |
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| GS88218CB-200 | 制造商:GSI Technology 功能描述:SRAM SYNC DUAL 2.5V/3.3V 9MBIT 512KX18 6.5NS/3NS 119FPBGA - Trays |
| GS88218CB-200I | 制造商:GSI Technology 功能描述:SRAM SYNC DUAL 2.5V/3.3V 9MBIT 512KX18 6.5NS/3NS 119FPBGA - Trays |
| GS88218CB-200IV | 制造商:GSI Technology 功能描述:SRAM SYNC DUAL 1.8V/2.5V 9MBIT 512KX18 6.5NS/3NS 119FPBGA - Trays |
| GS88218CB-200V | 制造商:GSI Technology 功能描述:SRAM SYNC DUAL 1.8V/2.5V 9MBIT 512KX18 6.5NS/3NS 119FPBGA - Trays |
| GS88218CB-250 | 制造商:GSI Technology 功能描述:SRAM SYNC DUAL 2.5V/3.3V 9MBIT 512KX18 5.5NS/2.5NS 119FPBGA - Trays |
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