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參數(shù)資料
型號(hào): HA1-5330-2
廠商: HARRIS SEMICONDUCTOR
元件分類(lèi): 運(yùn)動(dòng)控制電子
英文描述: 650ns Precision Sample and Hold Amplifier
中文描述: SAMPLE AND HOLD AMPLIFIER, 0.65 us ACQUISITION TIME, CDIP14
文件頁(yè)數(shù): 1/5頁(yè)
文件大小: 63K
代理商: HA1-5330-2
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143
|
Copyright
Intersil Corporation 1999
HA-5330
650ns Precision Sample and Hold
Amplifier
The HA-5330 is a very fast sample and hold amplifier
designed primarily for use with high speed A/D converters. It
utilizes the Intersil Dielectric Isolation process to achieve a
650ns acquisition time to 12-bit accuracy and a droop rate of
0.01
μ
V/
μ
s. The circuit consists of an input transconductance
amplifier capable of producing large amounts of charging
current, a low leakage analog switch, and an integrating
output stage which includes a 90pF hold capacitor.
The analog switch operates into a virtual ground, so charge
injection on the hold capacitor is constant and independent
of V
IN
. Charge injection is held to a low value by
compensation circuits and, if necessary, the resulting 0.5mV
hold step error can be adjusted to zero via the Offset Adjust
terminals. Compensation is also used to minimize leakage
currents which cause voltage droop in the Hold mode.
The HA-5330 will operate at reduced supply voltages (to
±
10V) with a reduced signal range. The MIL-STD-883 data
sheet for this device is available on request.
Pinout
HA-5330
(PDIP, CERDIP)
TOP VIEW
Features
Very Fast Acquisition . . . . . .500ns (0.1%) 650ns (0.01%)
Low Droop Rate . . . . . . . . . . . . . . . . . . . . . . . . 0.01
μ
V/
μ
s
Very Low Offset . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.2mV
High Slew Rate. . . . . . . . . . . . . . . . . . . . . . . . . . . . 90V/
μ
s
Wide Supply Range
. . . . . . . . . . . . . . . . . . . . . ±
10V to
±
20V
Internal Hold Capacitor
Fully Differential Input
TTL/CMOS Compatible
Applications
Precision Data Acquisition Systems
D/A Converter Deglitching
Auto-Zero Circuits
Peak Detectors
Functional Diagram
Ordering Information
PART NUMBER
TEMP.
RANGE (
o
C)
PACKAGE
PKG.
NO.
HA1-5330-2
-55 to 125
14 Ld CERDIP
F14.3
HA1-5330-5
0 to 75
14 Ld CERDIP
F14.3
HA3-5330-5
0 to 75
14 Ld PDIP
E14.3
+IN
NC
OFFSET ADJ.
OFFSET ADJ.
V-
NC
OUTPUT
-IN
NC
SIGNAL GND
SUPPLY GND
V+
NC
S/H CONTROL
1
2
3
4
5
6
7
14
13
12
11
10
9
8
GND
SUPPLY
V-
SIGNAL
GND
11
5
8
1
14
CONTROL
S/H
+IN
IN
-
HA-5330
7
OUT
12
90pF
OFFSET
ADJUST
4
3
V+
10
Data Sheet
September 1998
File Number
2858.3
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