- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄370430 > HB54R1G9F2U-B75B (ELPIDA MEMORY INC) 1GB Registered DDR SDRAM DIMM PDF資料下載
參數(shù)資料
| 型號： | HB54R1G9F2U-B75B |
| 廠商： | ELPIDA MEMORY INC |
| 元件分類： | DRAM |
| 英文描述： | 1GB Registered DDR SDRAM DIMM |
| 中文描述： | 128M X 72 DDR DRAM MODULE, 0.75 ns, DMA184 |
| 封裝： | DIMM-184 |
| 文件頁數(shù)： | 1/16頁 |
| 文件大小： | 159K |
| 代理商： | HB54R1G9F2U-B75B |
Document No. E0192H30 (Ver. 3.0)
Date Published September 2002 (K) Japan
URL: http://www.elpida.com
Elpida Memory, Inc. 2001-2002
Elpida Memory, Inc. is a joint venture DRAM company of NEC Corporation and Hitachi, Ltd.
DATA SHEET
1GB Registered DDR SDRAM DIMM
HB54R1G9F2U-A75B/B75B/10B
(128M words
×
72 bits, 2 Banks)
Description
The HB54R1G9F2U is a 128M
×
72
×
2 bank Double
Data Rate (DDR) SDRAM Module, mounted 36 pieces
of 256Mbits DDR SDRAM (HM5425401BTB) sealed in
TCP package, 1 piece of PLL clock driver, 2 pieces of
register driver and 1 piece of serial EEPROM (2k bits
EEPROM) for Presence Detect (PD). Read and write
operations are performed at the cross points of the CK
and the /CK. This high-speed data transfer is realized
by the 2-bit prefetch-pipelined architecture. Data
strobe (DQS) both for read and write are available for
high speed and reliable data bus design. By setting
extended mode register, the on-chip Delay Locked
Loop (DLL) can be set enable or disable. An outline of
the products is 184-pin socket type package (dual lead
out). Therefore, it makes high density mounting
possible without surface mount technology. It provides
common data inputs and outputs. Decoupling
capacitors are mounted beside each TCP on the
module board.
Note: Do not push the cover or drop the modules in
order to protect from mechanical defects, which
would be electrical defects.
Features
184-pin socket type package (dual lead out)
Outline: 133.35mm (Length)
×
30.48mm (Height)
×
4.80mm (Thickness)
Lead pitch: 1.27mm
2.5V power supply (VCC/VCCQ)
SSTL-2 interface for all inputs and outputs
Clock frequency: 143MHz/133MHz/125MHz (max.)
Data inputs and outputs are synchronized with DQS
4 banks can operate simultaneously and
independently (Component)
Burst read/write operation
Programmable burst length: 2, 4, 8
Burst read stop capability
Programmable burst sequence
Sequential
Interleave
Start addressing capability
Even and Odd
Programmable /CAS latency (CL): 3, 3.5
8192 refresh cycles: 7.8
μ
s (8192/64ms)
2 variations of refresh
Auto refresh
Self refresh
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| HB54R1G9F2U-10B | 1GB Registered DDR SDRAM DIMM |
| HB54R1G9F2U-A75B | 1GB Registered DDR SDRAM DIMM |
| HB54R1G9F2U | 1GB Registered DDR SDRAM DIMM |
| HB54R1G9F2 | 1GB Registered DDR SDRAM DIMM |
| HB54R1G9F2-10B | 1GB Registered DDR SDRAM DIMM |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| HB54R5128KN-10B | 制造商:ELPIDA 制造商全稱:Elpida Memory 功能描述:512MB DDR SDRAM SO DIMM |
| HB54R5128KN-A75B | 制造商:ELPIDA 制造商全稱:Elpida Memory 功能描述:512MB DDR SDRAM SO DIMM |
| HB54R5128KN-B75B | 制造商:ELPIDA 制造商全稱:Elpida Memory 功能描述:512MB DDR SDRAM SO DIMM |
| HB561003A-12 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:x(8+1) Page Mode DRAM Module |
| HB561003A-15 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:x(8+1) Page Mode DRAM Module |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。