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參數資料
| 型號： | HC5523IP |
| 廠商： | HARRIS SEMICONDUCTOR |
| 元件分類： | 模擬傳輸電路 |
| 英文描述： | LSSGR/TR57 CO/Loop Carrier SLIC with Low Power Standby |
| 中文描述： | TELECOM-SLIC, PDIP22 |
| 文件頁數： | 7/18頁 |
| 文件大小： | 176K |
| 代理商： | HC5523IP |
62
Circuit Operation and Design Information
The HC5523 is a current feed voltage sense
S
ubscriber
L
ine
I
nterface
C
ircuit (SLIC). This means that for short loop
applications the SLIC provides a programed constant current to
the tip and ring terminals while sensing the tip to ring voltage.
The following discussion separates the SLIC’s operation into
its DC and AC paths, then follows up with additional circuit
and design information.
Constant Loop Current (DC) Path
SLIC in the Active Mode
The DC path establishes a constant loop current that flows
out of tip and into the ring terminal. The loop current is
programmed by resistors R
DC1
, R
DC2
and the voltage on
the R
DC
pin (Figure 13). The R
DC
voltage is determined by
the voltage across R
1
in the saturation guard circuit. Under
constant current feed conditions, the voltage drop across R
1
sets the R
DC
voltage to -2.5V. This occurs when current
flows through R
1
into the current source I
2
. The R
DC
voltage
establishes a current (I
RSN
) that is equal to V
RDC
/(R
DC1
+R
DC2
). This current is then multiplied by 1000, in the loop
current circuit, to become the tip and ring loop currents.
For the purpose of the following discussion, the saturation
guard voltage is defined as the maximum tip to ring voltage
at which the SLIC can provide a constant current for a given
battery and overhead voltage.
For loop resistances that result in a tip to ring voltage less
than the saturation guard voltage the loop current is defined
as:
where: I
L
= Constant loop current.
R
DC1
and R
DC2
= Loop current programming resistors.
Capacitor C
DC
between R
DC1
and R
DC2
removes the VF
signals from the battery feed control loop. The value of C
DC
is determined by Equation 2:
where T = 30ms
NOTE:
Figure 14 illustrates the relationship between the tip to ring
voltage and the loop resistance. For a 0
loop resistance both
tip and ring are at V
BAT
/2. As the loop resistance increases,
so does the voltage differential between tip and ring. When
this differential voltage becomes equal to the saturation guard
voltage, the operation of the SLIC’s loop feed changes from a
constant current feed to a resistive feed. The loop current in
the resistive feed region is no longer constant but varies as a
function of the loop resistance.
The minimum C
DC
value is obtained if R
DC1
= R
DC2
Active State (C1, 2 = 0, 1)
On-Hook
I
CC
I
EE
I
BAT
-
3.7
5.8
mA
-
1.1
1.8
mA
-
2.2
3.7
mA
PSRR
V
CC
to 2 or 4-Wire Port
V
EE
to 2 or 4-Wire Port
V
BAT
to 2 or 4-Wire Port
(Note 30, Figure 12)
-
40
-
dB
(Note 30, Figure 12)
-
40
-
dB
(Note 30, Figure 12)
-
40
-
dB
FIGURE 12. POWER SUPPLY REJECTION RATIO
Electrical Specifications
T
A
= -40
o
C to 85
o
C, V
CC
= +5V
±
5%, V
EE
= -5V
±
5%, V
BAT
= -48V, AGND = BGND = 0V, R
DC1
= R
DC2
= 41.2k
,
R
D
= 39k
, R
SG
= 0
, R
F1
= R
F2
= 0
, C
HP
= 10nF, C
DC
= 1.5
μ
F, Z
L
= 600
, Unless Otherwise Specified. All pin
number references in the figures refer to the 28 lead PLCC package.
(Continued)
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
R
T
600k
R
RX
300k
R
L
600
V
TX
100mV
RMS
, 50Hz TO 4kHz
-48V SUPPLY
+5V SUPPLY
-5V SUPPLY
PSRR = 20 log (V
TX
/V
IN
)
TIP
27
V
TX
19
RING
28
RSN
16
I
L
DC1
R
DC2
----------------+
1000
×
=
(EQ. 1)
C
DC
T
DC1
---------------
DC2
---------------
+
×
=
(EQ. 2)
HC5523
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