
HCC/HCF4032B
HCC/HCF4038B
June1989
TRIPLE SERIAL ADDERS
.
INVERT INPUTS ON ALL ADDERS FOR SUM
COMPLEMENTING APPLICATIONS
.
FULLY STATIC OPERATION...DC TO 10MHz
(typ.) @ V
DD
= 10V
.
BUFFERED INPUTS ANDOUTPUTS
.
SINGLE-PHASE CLOCKING
.
STANDARDIZED
CHARACTERISTICS
.
QUIESCENT CURRENT SPECIFIED TO 20V
FOR HCC DEVICE
.
5V, 10V, AND 15V PARAMETRIC RATING
.
INPUT CURRENT OF100nAAT 18V AND 25
°
C
FOR HCC DEVICE
.
100% TESTEDFOR QUIESCENTCURRENT
.
MEETSALLREQUIREMENTSOFJEDECTEN-
TATIVESTANDARDN
°
13A,”STANDARDSPE-
CIFICATIONS FOR DESCRIPTION OF ”B”
SERIESCMOS DEVICES”
SYMMETRICAL
OUTPUT
DESCRIPTION
The
HCC/4032B/4038B
(extended temperature
range) and
HCF4032B/4038B
(intermediate tem-
perature range) are monolithic integrated circuits,
available in 16-lead dual in-line plastic or ceramic
package and plastic micro package.
The
HCC/HCF4032B
and
HCC/HCF4038B
types
consist of three serial adder circuits with common
CLOCK and CARRY-RESET inputs. Each adder
has two provisions for two serial DATA INPUT sig-
nals and an INVERT command signal. When the
command signal is a logical ”1”, the sum is com-
plemented. Data words enter the adder with the
leastsignificant bit first;thesignbittrails.Theoutput
istheMOD2sumof theinputbitsplusthecarry from
the previous bit position. The carry is only added at
the
positive-going
clock
HCC/HCF4032B
or at the negative-going clock for
the
HCC/HCF4038B
, thus,for spike-free operation
the input data transitions should occur as soon as
possible after the triggering edge. The CARRY is
reset to a logical ”0” at the end of each word by ap-
plyinga logical ”1” signal toa CARRY-RESET input
one-bit-position before the application of the first bit
of the next word.
transition
for
the
EY
(Plastic Package)
F
(Ceramic Package)
M1
(Micro Package)
C1
(Plastic ChipCarrier)
ORDERCODES :
HCC40XXBF
HCF40XXBEY
HCF40XXBM1
HCF40XXBC1
PIN CONNECTIONS
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