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參數資料
| 型號： | HCS05DMSR |
| 廠商： | HARRIS SEMICONDUCTOR |
| 元件分類： | 通用總線功能 |
| 英文描述： | JFET; Transistor Polarity:N Channel; Breakdown Voltage, V(br)gss:-30V; Zero Gate Voltage Drain Current Min, Idss:50mA; Gate-Source Cutoff Voltage Max, Vgs(off):-10V; Current Rating:50mA; Voltage Rating:30V |
| 中文描述： | HC/UH SERIES, HEX 1-INPUT INVERT GATE, CDIP14 |
| 文件頁數： | 1/7頁 |
| 文件大小： | 107K |
| 代理商： | HCS05DMSR |
35
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143 | Copyright Intersil Corporation 1999
HCS05MS
Radiation Hardened
Hex Inverter with Open Drain
Pinouts
14 LEAD CERAMIC DUAL-IN-LINE
METAL SEAL PACKAGE (SBDIP)
MIL-STD-1835 CDIP2-T14, LEAD FINISH C
TOP VIEW
14 LEAD CERAMIC METAL SEAL
FLATPACK PACKAGE (FLATPACK)
MIL-STD-1835 CDFP3-F14, LEAD FINISH C
TOP VIEW
Functional Diagram
TRUTH TABLE
INPUTS
OUTPUTS
An
Yn
L
Z (Note 1)
H (Note 2)
H
L
NOTES:
1. No pullup resistor
2. With pullup resistor
3. L = Low
4. H = High
A1
Y1
A2
Y2
A3
Y3
GND
VCC
A6
Y6
A5
Y5
A4
Y4
1
2
3
4
5
6
7
14
13
12
11
10
9
8
14
13
12
11
10
9
8
2
3
4
5
6
7
1
A1
Y1
A2
Y2
A3
Y3
GND
VCC
A6
Y6
A5
Y5
A4
Y4
An
Yn
Features
3 Micron Radiation Hardened SOS CMOS
Total Dose 200K RAD (Si)
SEP Effective LET No Upsets: >100 MEV-cm
2
/mg
Single Event Upset (SEU) Immunity < 2 x 10
-9
Errors/Bit-Day
(Typ)
Dose Rate Survivability: >1 x 10
12
RAD (Si)/s
Dose Rate Upset >10
10
RAD (Si)/s 20ns Pulse
Latch-Up Free Under Any Conditions
Military Temperature Range: -55
o
C to +125
o
C
Significant Power Reduction Compared to LSTTL ICs
DC Operating Voltage Range: 4.5V to 5.5V
Input Logic Levels
- VIL = 30% of VCC Max
- VIH = 70% of VCC Min
Input Current Levels Ii
≤
5
μ
A at VOL, VOH
Description
The Intersil HCS05MS is a Radiation Hardened Hex inverter
function with open drain outputs. These open drain outputs can
drive into resistive loads with a separate voltage supply.
The HCS05MS utilizes advanced CMOS/SOS technology to
achieve high-speed operation. This device is a member of
radiation hardened, high-speed, CMOS/SOS Logic Family.
The HCS05MS is supplied in a 14 lead Ceramic Flatpack (K suffix)
or a Ceramic Dual-In-Line Package (D suffix).
Ordering Information
PART
NUMBER
TEMPERATURE
RANGE
SCREENING
LEVEL
PACKAGE
HCS05DMSR
-55
o
C to +125
o
C
Intersil Class
S Equivalent
14 Lead SBDIP
HCS05KMSR
-55
o
C to +125
o
C
Intersil Class
S Equivalent
14 Lead Ceramic
Flatpack
HCS05D/
Sample
+25
o
C
Sample
14 Lead SBDIP
HCS05K/
Sample
+25
o
C
Sample
14 Lead Ceramic
Flatpack
HCS05HMSR
+25
o
C
Die
Die
September 1995
Spec Number
518829
File Number
3557.1
相關PDF資料 |
PDF描述 |
|---|---|
| HCS05K | JFET-N-CHANNEL SWITCH |
| HCS05MS | Bipolar Transistor; Power Dissipation, Pd:175W; DC Current Gain Min (hfe):10; Collector Current:20A; DC Current Gain Max (hfe):60; Power (Ptot):175W; Transistor Polarity:N Channel |
| HCS05HMSR | Radiation Hardened Hex Inverter with Open Drain |
| HCS100 | Bi-directional Authenticator(雙向文電鑒別碼) |
| HCS120 | Bi-directional Authenticator(雙向文電鑒別碼) |
相關代理商/技術參數 |
參數描述 |
|---|---|
| HCS05HMSR | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:Radiation Hardened Triple 3-Input NAND Gate |
| HCS05K | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:Radiation Hardened Triple 3-Input NAND Gate |
| HCS05KMSR | 制造商:Intersil Corporation 功能描述:BFFR/DRVR HEX INV OPEN DRAIN CMOS 14PIN CFLATPACK - Bulk |
| HCS05MS | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:Radiation Hardened Hex Inverter with Open Drain |
| HCS08 | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:Radiation Hardened Quad 2-Input AND Gate |
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