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參數資料
| 型號： | HCS21MS |
| 廠商： | Intersil Corporation |
| 英文描述： | Radiation Hardened Dual 4-Input AND Gate |
| 中文描述： | 輻射加固雙路4輸入與門 |
| 文件頁數： | 1/8頁 |
| 文件大小： | 184K |
| 代理商： | HCS21MS |
53
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143 | Copyright Intersil Corporation 1999
HCS21MS
Radiation Hardened
Dual 4-Input AND Gate
Pinouts
14 LEAD CERAMIC DUAL-IN-LINE
METAL SEAL PACKAGE (SBDIP)
MIL-STD-1835 CDIP2-T14, LEAD FINISH C
TOP VIEW
14 LEAD CERAMIC METAL SEAL FLATPACK PACKAGE
(FLATPACK) MIL-STD-1835 CDFP3-F14, LEAD FINISH C
TOP VIEW
Functional Diagram
TRUTH TABLE
INPUTS
OUTPUTS
An
Bn
Cn
Dn
Yn
L
X
X
X
L
X
L
X
X
L
X
X
L
X
L
X
X
X
L
L
H
H
HX
H
H
NOTE: L = Logic Level Low, H = Logic level High, X = Don’t
Care
A1
B1
NC
C1
D1
Y1
GND
VCC
D2
C2
NC
B2
A2
Y2
1
2
3
4
5
6
7
14
13
12
11
10
9
8
14
13
12
11
10
9
8
2
3
4
5
6
7
1
A1
B1
NC
C1
D1
Y1
GND
VCC
D2
C2
NC
B2
A2
Y2
An (1, 9)
Bn (2, 10)
Yn (6, 8)
Cn (4, 12)
Dn (5, 13)
Features
3 Micron Radiation Hardened SOS CMOS
Total Dose 200K RAD (Si)
SEP Effective LET No Upsets: >100 MEV-cm
2
/mg
Single Event Upset (SEU) Immunity < 2 x 10
-9
Errors/Bit-Day
(Typ)
Dose Rate Survivability: >1 x 10
12
RAD (Si)/s
Dose Rate Upset >10
10
RAD (Si)/s 20ns Pulse
Latch-Up Free Under Any Conditions
Military Temperature Range: -55
o
C to +125
o
C
Significant Power Reduction Compared to LSTTL ICs
DC Operating Voltage Range: 4.5V to 5.5V
Input Logic Levels
- VIL = 30% of VCC Max
- VIH = 70% of VCC Min
Input Current Levels Ii
≤
5
μ
A at VOL, VOH
Description
The Intersil HCS21MS is a Radiation Hardened Dual Input AND
Gate. A high on all inputs forces the output to a High state.
The HCS21MS utilizes advanced CMOS/SOS technology to
achieve high-speed operation. This device is a member of radia-
tion hardened, high-speed, CMOS/SOS Logic Family.
The HCS21MS is supplied in a 14 lead Ceramic flatpack (K suffix)
or a SBDIP Package (D suffix).
Ordering Information
PART
NUMBER
TEMPERATURE
RANGE
SCREENING
LEVEL
PACKAGE
HCS21DMSR
-55
o
C to +125
o
C
Intersil Class
S Equivalent
14 Lead SBDIP
HCS21KMSR
-55
o
C to +125
o
C
Intersil Class
S Equivalent
14 Lead Ceramic
Flatpack
HCS21D/
Sample
+25
o
C
Sample
14 Lead SBDIP
HCS21K/
Sample
+25
o
C
Sample
14 Lead Ceramic
Flatpack
HCS21HMSR
+25
o
C
Die
Die
September 1995
Spec Number
518762
File Number
3052.1
相關PDF資料 |
PDF描述 |
|---|---|
| HCS21HMSR | Radiation Hardened Dual 4-Input AND Gate |
| HCS21KMSR | Radiation Hardened Dual 4-Input AND Gate |
| HCS32D | Radiation Hardened Quad 2-Input OR Gate |
| HCS32DMSR | Radiation Hardened Quad 2-Input OR Gate |
| HCS32K | Radiation Hardened Quad 2-Input OR Gate |
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| HCS240D | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:Radiation Hardened Octal Buffer/Line Driver, Three-State |
| HCS240DMSR | 制造商:Intersil Corporation 功能描述:BFFR/LINE DRVR OCTAL INV 3-ST CMOS 20PIN SBDIP - Rail/Tube |
| HCS240HMSR | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:Radiation Hardened Octal Buffer/Line Driver, Three-State |
| HCS240K | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:Radiation Hardened Octal Buffer/Line Driver, Three-State |
| HCS240KMSR | 制造商:Intersil Corporation 功能描述:BFFR/LINE DRVR OCTAL INV 3-ST CMOS 20PIN CFLATPACK - Bulk |
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