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參數資料
| 型號： | HCS373DTR |
| 廠商： | HARRIS SEMICONDUCTOR |
| 元件分類： | 通用總線功能 |
| 英文描述： | Radiation Hardened Octal Transparent Latch, Three-State |
| 中文描述： | HC/UH SERIES, 8-BIT DRIVER, TRUE OUTPUT, CDIP20 |
| 文件頁數： | 1/3頁 |
| 文件大小： | 95K |
| 代理商： | HCS373DTR |
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
www.intersil.com or 407-727-9207
|
Copyright
Intersil Corporation 1999
Satellite Applications Flow (SAF) is a trademark of Intersil Corporation.
HCS373T
Radiation Hardened Octal Transparent
Latch, Three-State
Intersil’s Satellite Applications Flow
TM
(SAF) devices are fully
tested and guaranteed to 100kRAD total dose. These QML
Class T devices are processed to a standard flow intended
to meet the cost and shorter lead-time needs of large
volume satellite manufacturers, while maintaining a high
level of reliability.
The Intersil HCS373T is a Radiation Hardened Octal
Transparent Three-State Latch with an active-low output
enable. The HCS373T utilizes advanced CMOS/SOS
technology. The outputs are transparent to the inputs when
the Latch Enable (LE) is HIGH. When the Latch Enable (LE)
goes LOW, the data is latched. The Output Enable (OE)
controls the three-state outputs. When the Output Enable
(OE) is HIGH, the outputs are in the high impedance state.
The latch operation is independent of the state of the Output
Enable.
Specifications
Specifications for Rad Hard QML devices are controlled by
the Defense Supply Center in Columbus (DSCC). The SMD
numbers listed below must be used when ordering.
Detailed Electrical Specifications for the HCS373T are
contained in SMD 5962-95792.
A “hot-link” is provided from
our website for downloading
.
www.intersil.com/spacedefense/newsafclasst.asp
Intersil’s Quality Management Plan (QM Plan), listing all
Class T screening operations, is also available on our
website.
www.intersil.com/quality/manuals.asp
Features
QML Class T, Per MIL-PRF-38535
Radiation Performance
- Gamma Dose (
γ
) 1 x 10
5
RAD(Si)
- Latch-Up Free Under Any Conditions
- SEP Effective LET No Upsets: >100 MEV-cm
2
/mg
- Single Event Upset (SEU) Immunity < 2 x 10
-9
Errors/Bit-Day (Typ)
3 Micron Radiation Hardened CMOS SOS
Significant Power Reduction Compared to LSTTL ICs
DC Operating Voltage Range: 4.5V to 5.5V
Input Logic Levels
- V
IL
= 0.3 V
CC
Max
- V
IH
= 0.7 V
CC
Min
Input Current Levels Ii
≤
5mA at V
OL
, V
OH
Pinouts
HCS373DTR (SBDIP), CDIP2-T20
TOP VIEW
HCS373KTR (FLATPACK), CDFP4-F20
TOP VIEW
Ordering Information
ORDERING
NUMBER
PART NUMBER
TEMP.
RANGE
(
o
C)
5962R9579201TRC
HCS373DTR
-55 to 125
5962R9579201TXC
HCS373KTR
-55 to 125
NOTE:
Minimum order quantity for -T is 150 units through
distribution, or 450 units direct.
11
12
13
14
15
16
17
18
20
19
10
9
8
7
6
5
4
3
2
1
OE
Q0
D0
D1
Q1
Q2
D3
D2
Q3
GND
V
CC
Q7
D7
D6
Q6
Q5
D5
D4
Q4
LE
2
3
4
5
6
7
8
9
10
1
20
19
18
17
16
15
14
13
12
11
OE
Q0
D0
D1
Q1
Q2
D2
D3
Q3
GND
V
CC
Q7
D7
D6
Q6
Q5
D5
D4
Q4
LE
Data Sheet
July 1999
File Number
4617.1
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PDF描述 |
|---|---|
| HCS373KTR | Radiation Hardened Octal Transparent Latch, Three-State |
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相關代理商/技術參數 |
參數描述 |
|---|---|
| HCS373KMSR | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:8-Bit D-Type Latch |
| HCS373KTR | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:Radiation Hardened Octal Transparent Latch, Three-State |
| HCS373MS | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:Radiation Hardened Octal Transparent Latch, Three-State |
| HCS373T | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:Radiation Hardened Octal Transparent Latch, Three-State |
| HCS374D | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:Radiation Hardened Octal D-Type Flip-Flop, Three-State, Positive Edge Triggered |
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