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參數資料
| 型號： | HCTS85K |
| 廠商： | Intersil Corporation |
| 英文描述： | Radiation Hardened 4-Bit Magnitude Comparator |
| 中文描述： | 輻射加固4位數值比較 |
| 文件頁數： | 1/10頁 |
| 文件大小： | 214K |
| 代理商： | HCTS85K |
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
http://www.intersil.com or 407-727-9207
|
Copyright
Intersil Corporation 1999
Ordering Information
PART NUMBER
TEMPERATURE RANGE
SCREENING LEVEL
PACKAGE
HCTS85DMSR
-55
o
C to +125
o
C
Intersil Class S Equivalent
16 Lead SBDIP
HCTS85KMSR
-55
o
C to +125
o
C
Intersil Class S Equivalent
16 Lead Ceramic Flatpack
HCTS85D/Sample
+25
o
C
Sample
16 Lead SBDIP
HCTS85K/Sample
+25
o
C
Sample
16 Lead Ceramic Flatpack
HCTS85HMSR
+25
o
C
Die
Die
HCTS85MS
Radiation Hardened
4-Bit Magnitude Comparator
Pinouts
16 LEAD CERAMIC DUAL-IN-LINE METAL SEAL PACKAGE
(SBDIP) MIL-STD-1835 CDIP2-T16, LEAD FINISH C
TOP VIEW
16 LEAD CERAMIC METAL SEAL FLATPACK PACKAGE
(FLATPACK) MIL-STD-1835 CDFP4-F16, LEAD FINISH C
TOP VIEW
14
15
16
9
13
12
11
10
1
2
3
4
5
7
6
8
B3
(A<B)IN
(A=B)IN
(A>B)IN
(A<B)OUT
(A=B)OUT
GND
(A>B)OUT
VCC
B2
A2
A1
B1
A0
B0
A3
2
3
4
5
6
7
8
1
16
15
14
13
12
11
10
9
B3
(A<B)IN
(A=B)IN
(A>B)IN
(A<B)OUT
(A=B)OUT
GND
(A>B)OUT
VCC
B2
A2
A1
B1
A0
B0
A3
Features
3 Micron Radiation Hardened SOS CMOS
Total Dose 200K RAD (Si)
SEP Effective LET No Upsets: >100 MEV-cm
2
/mg
Single Event Upset (SEU) Immunity < 2 x 10
-9
Errors/
Bit-Day (Typ)
Dose Rate Survivability: >1 x 10
12
RAD (Si)/s
Dose Rate Upset >10
10
RAD (Si)/s 20ns Pulse
Latch-Up Free Under Any Conditions
Fanout (Over Temperature Range)
-Standard Outputs: 10 LSTTL Loads
Military Temperature Range: -55
o
C to +125
o
C
Significant Power Reduction Compared to LSTTL ICs
DC Operating Voltage Range: 4.5V to 5.5V
LSTTL Input Compatibility
-VIL = 0.8V Max
-VIH = VCC/2 Min
Input Current Levels Ii
≤
5
μ
A at VOL, VOH
Description
The Intersil HCTS85MS is a Radiation Hardened 4-bit high
speed magnitude comparator. This device compares two
binary, BCD, or other monotonic codes and presents the
three possible magnitude results at the outputs (A>B, A<B,
and A=B). The 4-bit input words are weighted (A0 to A3 and
B0 to B3), where A3 and B3 are the most significant bits.
The HCTS85MS is expandable without external gating, both
serial and parallel operation.
The HCTS85MS utilizes advanced CMOS/SOS technology
to achieve high-speed operation. This device is a member of
radiation hardened, high-speed, CMOS/SOS Logic Family
with TTL input compatibility.
The HCTS85MS is supplied in a 16 lead Ceramic flatpack
(K suffix) or a SBDIP Package (D suffix).
September 1995
Spec Number
518624
File Number
3059.1
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| HCTS85HMSR | Radiation Hardened 4-Bit Magnitude Comparator |
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相關代理商/技術參數 |
參數描述 |
|---|---|
| HCTS85KMSR | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:Radiation Hardened 4-Bit Magnitude Comparator |
| HCTS85MS | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:Radiation Hardened 4-Bit Magnitude Comparator |
| HCTS85MS_02 | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:Radiation Hardened 4-Bit Magnitude Comparator |
| HCTS86D | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:Radiation Hardened Quad 2-Input Exclusive OR Gate |
| HCTS86DMSR | 制造商:Intersil Corporation 功能描述:RADHARD QUAD 2-INPUT EXCLUSIV-OR GATE,DP,200K,TTL,CLASS V - Rail/Tube |
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