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參數(shù)資料
| 型號： | HD-15531 |
| 廠商： | Intersil Corporation |
| 英文描述： | CMOS Manchester Encoder-Decoder |
| 中文描述： | 的CMOS曼徹斯特編碼，解碼器 |
| 文件頁數(shù)： | 1/8頁 |
| 文件大小： | 115K |
| 代理商： | HD-15531 |
5-170
March 1997
HD-15531/883
CMOS Manchester Encoder-Decoder
Features
This Circuit is Processed in Accordance to MIL-STD-
883 and is Fully Conformant Under the Provisions of
Paragraph 1.2.1.
Support of MIL-STD-1553
Data Rate (15531B) . . . . . . . . . . . . . . . 2.5 Megabit/Sec
Data Rate (15531). . . . . . . . . . . . . . . . 1.25 Megabit/Sec
Variable Frame Length to 32-Bits
Sync Identification and Lock-In
Separate Manchester II Encode, Decode
Low Operating Power . . . . . . . . . . . . . . . . .50mW at 5V
Description
The Intersil HD-15531/883 is a high performance CMOS
device intended to service the requirements of MIL-STD-
1553 and similar Manchester II encoded, time division multi-
plexed serial data protocols. This LSI chip is divided into two
sections, an Encoder and a Decoder. These sections oper-
ate independently of each other, except for the master reset
and word length functions. This circuit provides many of the
requirements of MIL-STD-1553. The Encoder produces the
sync pulse and the parity bit as well as the encoding of the
data bits. The Decoder recognizes the sync pulse and identi-
fies it as well as decoding the data bits and checking parity.
The HD-15531/883 also surpasses the requirements of MIL-
STD-1553 by allowing the word length to be programmable
(from 2 to 28 data bits). A frame consists of three bits for
sync followed by the data word (2 to 28 data bits) followed by
one bit of parity, thus, the frame length will vary from 6 to 32
bit periods. This chip also allows selection of either even or
odd parity for the Encoder and Decoder separately.
This integrated circuit is fully guaranteed to support the
1MHz data rate of MIL-STD-1553 over both temperature and
voltage. For high speed applications the 15531B will support
a 2.5 Megabit/sec data rate.
The HD-15531/883 can also be used in many party line digi-
tal data communications applications, such as a local area
network or an environmental control system driven from a
single twisted pair or fiber optic cable throughout a building.
Ordering Information
PACKAGE
TEMPERATURE RANGE
1.25MBIT/SEC
2.5MBIT/SEC
PKG. NO.
CERDIP
-55
o
C to +125
o
C
HD1-15531/883
HD1-15531B/883
F40.6
File Number
2962.1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
http://www.intersil.com or 407-727-9207
|
Copyright
Intersil Corporation 1999
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PDF描述 |
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| HD-15531883 | SCR Thyristor; SCR Type:Sensitive Gate; Peak Repetitive Off-State Voltage, Vdrm:30V; On-State RMS Current, IT(rms):4A; Peak Non Repetitive Surge Current, Itsm:20A; Gate Trigger Current Max, Igt:50uA |
| HD1-15531B | CMOS Manchester Encoder-Decoder |
| HD1-15531 | ENCODER/DECODER|CMOS|DIP|40PIN|CERAMIC |
| HD1-15531B-2 | Encoder/Decoder |
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| HD-15531/883 | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:CMOS Manchester Encoder-Decoder |
| HD-15531_02 | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:CMOS Manchester Encoder-Decoder |
| HD-15531883 | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:CMOS Manchester Encoder-Decoder |
| HD155-48 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Analog IC |
| HD155-5 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Analog IC |
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