參數資料
| 型號： | HD3-6402R-9Z |
| 廠商： | Intersil |
| 文件頁數： | 1/7頁 |
| 文件大小： | 0K |
| 描述： | IC UART CMOS 5V 2MHZ 40-DIP |
| 標準包裝： | 9 |
| 特點： | 低功率 CMOS |
| 通道數： | 8 |
| 電源電壓： | 4.5 V ~ 5.5 V |
| 帶故障啟動位檢測功能： | 是 |
| 帶CMOS： | 是 |
| 安裝類型： | 通孔 |
| 封裝/外殼： | 40-DIP（0.600"，15.24mm） |
| 供應商設備封裝： | 40-DIP |
| 包裝： | 管件 |
1
HD-6402
CMOS Universal Asynchronous
Receiver Transmitter (UART)
The HD-6402 is a CMOS UART for interfacing computers or
microprocessors to an asynchronous serial data channel.
The receiver converts serial start, data, parity and stop bits.
The transmitter converts parallel data into serial form and
automatically adds start, parity and stop bits. The data word
length can be 5, 6, 7 or 8 bits. Parity may be odd or even.
Parity checking and generation can be inhibited. The stop
bits may be one or two or one and one-half when
transmitting 5-bit code.
The HD-6402 can be used in a wide range of applications
including modems, printers, peripherals and remote data
acquisition systems. Utilizing the Intersil advanced scaled
SAJI IV CMOS process permits operation clock frequencies
up to 8.0MHz (500K Baud). Power requirements, by
comparison, are reduced from 300mW to 10mW. Status
logic increases flexibility and simplifies the user interface.
Pinout
HD-6402 (PDIP, CERDIP)
TOP VIEW
Features
8.0MHz Operating Frequency (5962-9052502)
2.0MHz Operating Frequency (HD3-6402R)
Low Power CMOS Design
Programmable Word Length, Stop Bits and Parity
Automatic Data Formatting and Status Generation
Compatible with Industry Standard UARTs
Single +5V Power Supply
CMOS/TTL Compatible Inputs
Pb-Free Plus Anneal Available (RoHS Compliant)
13
1
2
3
4
5
6
7
8
9
10
11
12
14
15
16
17
18
19
20
VCC
NC
GND
RRD
RBR8
RBR7
RBR6
RBR5
RBR4
RBR3
RBR2
RBR1
PE
FE
OE
SFD
RRC
DRR
DR
RRI
28
40
39
38
37
36
35
34
33
32
31
30
29
27
26
25
24
23
22
21
TRC
EPE
CLS1
CLS2
SBS
PI
CRL
TBR8
TBR7
TBR6
TBR5
TBR4
TBR3
TBR2
TBR1
TRO
TRE
TBRL
TBRE
MR
Ordering Information
PACKAGE
TEMP
RANGE (°C)
2MHz = 125K
BAUD
8MHz = 500K
BAUD
PKG.
DWG.
#
PDIP
-40 to +85 HD3-6402R-9
E40.6
PDIP*
(Pb-free)
-40 to +85 HD3-6402R-9Z
(Note)
E40.6
CERDIP -
SMD#
-55 to +125
5962-
9052502MQA
F40.6
NOTE: Intersil Pb-free plus anneal products employ special Pb-free
material sets; molding compounds/die attach materials and 100%
matte tin plate termination finish, which are RoHS compliant and
compatible with both SnPb and Pb-free soldering operations. Intersil
Pb-free products are MSL classified at Pb-free peak reflow
temperatures that meet or exceed the Pb-free requirements of
IPC/JEDEC J STD-020.
*Pb-free PDIPs can be used for through hole wave solder processing
only. They are not intended for use in Reflow solder processing
applications.
Data Sheet
FN2956.3
October 31, 2005
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774
| Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright Intersil Americas Inc. 2001, 2005. All Rights Reserved
All other trademarks mentioned are the property of their respective owners.
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