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參數資料
| 型號： | HD74HC114 |
| 廠商： | Hitachi,Ltd. |
| 英文描述： | Dual J-K Flip-Flops (with Preset, Common Clear and Common Clock) |
| 中文描述： | 雙JK觸發器（帶預置，共同明確和共同的時鐘） |
| 文件頁數： | 1/8頁 |
| 文件大小： | 49K |
| 代理商： | HD74HC114 |
HD74HC114
Dual J-K Flip-Flops (with Preset, Common Clear and
Common Clock)
Description
This flip-flop is edge sensitive to the clock input and change state on the negative transition of the clock
pulse. each flip-flop has independent J, K and preset inputs and Q and
Q
outputs. Two flip-flops are
controlled by a common clear and a common clock. Preset and clear are independent of the clock and
accomplished by a low logic level on the corresponding input.
Features
High Speed Operation: t
pd
(Clock to Q) = 18 ns typ (C
L
= 50 pF)
High Output Current: Fanout of 10 LSTTL Loads
Wide Operating Voltage: V
CC
= 2 to 6 V
Low Input Current: 1 μA max
Low Quiescent Supply Current: I
CC
(static) = 2 μA max (Ta = 25°C)
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