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參數資料
| 型號： | HD74HC137 |
| 廠商： | Hitachi,Ltd. |
| 元件分類： | 通用總線功能 |
| 英文描述： | Synchronous 4-Bit Up/Down Binary Counters With Dual Clock 16-CFP -55 to 125 |
| 中文描述： | 3至8線解碼器/解復用器的地址鎖存器 |
| 文件頁數： | 1/10頁 |
| 文件大小： | 60K |
| 代理商： | HD74HC137 |
HD74HC137
3-to-8-line Decoder/Demultiplexer with Address Latch
Description
The HD74HC137 implements a three-to-eight line decoder with latches on the three address inputs. When
GL
goes from low to high, the address present at the select inputs (A, B and C) is stored in the latches. As
long as
GL
remains high no address changes will be recognized. Output enable controls, G
1
and G
2
, control
the state of the outputs independently of the select or latch-enable inputs.
All of the outputs are high unless G
1
is high and G
2
is low. The HD74HC137 is ideally suited for the
implementation of glitchfree decoders in stored-address applications in bus oriented systems.
Features
High Speed Operation: t
pd
(A, B, C to Y) = 16.5 ns typ (C
L
= 50 pF)
High Output Current: Fanout of 10 LSTTL Loads
Wide Operating Voltage: V
CC
= 2 V to 6 V
Low Input Current: 1 μA max
Low Quiescent Supply Current: I
CC
(static) = 4 μA max (Ta = 25°C)
相關PDF資料 |
PDF描述 |
|---|---|
| HD74HC138 | 3-to-8-line Decoder/Demultiplexer |
| HD74HC139 | Dual 2-to-4-line Decoders/Demultiplexers |
| HD74HC147 | Dual 4-Input Positive-NAND Gates 14-CDIP -55 to 125 |
| HD74HC148 | Dual 4-Input Positive-NAND Gates 20-LCCC -55 to 125 |
| HD74HC149 | Dual 4-Input Positive-NAND Gates 14-CDIP -55 to 125 |
相關代理商/技術參數 |
參數描述 |
|---|---|
| HD74HC137P | 制造商:Renesas Electronics 功能描述:74HC 3-to-8 Line Decoder with Address Latch 制造商:Renesas Electronics 功能描述:74HC 3-to-8 Line Decoder with Address Latch Bulk |
| HD74HC138FP | 制造商:Renesas Electronics Corporation 功能描述:Decoder/Demultiplexer Single 3-to-8 16-Pin SOP |
| HD74HC138FP-E | 制造商:Renesas Electronics Corporation 功能描述:Logic, 74HC series, SOP-16 |
| HD74HC138P-E | 制造商:Renesas Electronics Corporation 功能描述: |
| HD74HC138-T-ELL-E | 制造商:Renesas Electronics Corporation 功能描述: |
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