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參數資料
| 型號： | HD74HC77 |
| 廠商： | Hitachi,Ltd. |
| 英文描述： | 4-bit Bistable Latch |
| 中文描述： | 4位雙穩態鎖存 |
| 文件頁數： | 1/9頁 |
| 文件大小： | 48K |
| 代理商： | HD74HC77 |
HD74HC77
4-bit Bistable Latch
Description
The HD74HC77 is ideally suited for use as temporary storage for binary information between processing
units and input/output or indicator units. Information present at a data (D) input is transferred to the Q
output when the enable (G) is high and the Q output will follow the data input as long as the enable remains
high. When the enable goes low the information (that was present at the data input at the time the transition
occurred) is retained at the Q output until the enable is permitted to go high.
Features
High Speed Operation: t
pd
(D to Q) = 12 ns typ (C
L
= 50 pF)
High Output Current: Fanout of 10 LSTTL Loads
Wide Operating Voltage: V
CC
= 2 to 6 V
Low Input Current: 1 μA max
Low Quiescent Supply Current: I
CC
(static) = 2 μA max (Ta = 25°C)
Function Table
Inputs
Output
D
G
Q
L
H
L
H
H
H
X
L
No change
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