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參數資料
| 型號： | HD74HCT138 |
| 廠商： | Hitachi,Ltd. |
| 英文描述： | 3-to-8-line Decoder/Demultiplexer |
| 中文描述： | 3至8線解碼器/解復用器 |
| 文件頁數： | 1/8頁 |
| 文件大小： | 47K |
| 代理商： | HD74HCT138 |
HD74HCT138
3-to-8-line Decoder/Demultiplexer
Description
The HD74HCT138 has 3 binary select inputs (A, B, and C). If the device is enabled these inputs determine
which one of the eight normally high outputs will go low. Two active low and one active high enables (G
1
,
G
2A
and G
2B
) are provided to ease the cascading of decoders.
Features
LSTTL Output Logic Level Compatibility as well as CMOS Output Compatibility
High Speed Operation: t
pd
(A, B, C to Y) = 18.5 ns typ (C
L
= 50 pF)
High Output Current: Fanout of 10 LSTTL Loads
Wide Operating Voltage: V
CC
= 4.5 to 5.5 V
Low Input Current: 1 μA max
Low Quiescent Supply Current: I
CC
(static) = 4 μA max (Ta = 25°C)
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