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參數資料
| 型號： | HDD16M64F8-13B |
| 廠商： | Hanbit Electronics Co.,Ltd. |
| 英文描述： | DDR SDRAM Module 128Mbyte (16Mx64bit), based on16Mx8,4Banks, 4K Ref., SMM, |
| 中文描述： | DDR SDRAM內存模塊128Mbyte（16Mx64bit）根據on16Mx8，4Banks，4K的參考。，SMM的， |
| 文件頁數： | 1/11頁 |
| 文件大?。?/td> | 147K |
| 代理商： | HDD16M64F8-13B |
HANBit
HDD16M64F8
URL : www.hbe.co.kr 1 HANBit Electronics Co.,Ltd.
REV 1.0(August.2002)
GENERAL DESCRIPTION
The HDD16M64F8 is a 32M x 64 bit Double Data Rate(DDR) Synchronous Dynamic RAM high-density memory module.
The module consists of eight CMOS 16M x 8 bit with 4banks DDR SDRAMs in 66pin TSOP-II 400mil packages and 2K
EEPROM in 8-pin TSSOP package on a 200-pin glass-epoxy. Four 0.1uF decoupling capacitors are mounted on the printed
circuit board in parallel for each DDR SDRAM. The HSD16M64F8L is a SMM(Stackable Memory Module
type) .Synchronous design allows precise cycle control with the use of system clock. Data I/O transactions are possible on
both edges of DQS. Range of operating frequencies, programmable latencies and burst lengths allows the same device to
be useful for a variety of high bandwidth, high performance memory system applications. All module components may be
powered from a single 2.5V DC power supply and all inputs and outputs are SSTL_2 compatible.
FEATURES
Part Identification
HDD16M64F8
–
10A : 100MHz (CL=2)
HDD16M64F8
–
13A : 133MHz (CL=2)
HDD16M64F8
–
13B : 133MHz (CL=2.5)
128MB(16Mx64) Unbuffered DDR SMM based on 16Mx8 DDR SDRSM
2.5V
±
0.2V VDD and VDDQ power supply
Auto & self refresh capability (4096 Cycles/64ms)
All input and output are compatible with SSTL_2 interface
Data(DQ), Data strobes and write masks latched on the rising and falling edges of the clock
All Addresses and control inputs except Data(DQ), Data strobes and Data masks latched on the rising edges of the clock
MRS cycle with address key programs
- Latency (Access from column address) : 2, 2.5
- Burst length : 2, 4, 8
- Data scramble : Sequential & Interleave
Data(DQ), Data strobes and write masks latched on the rising and falling edges of the clock
All Addresses and control inputs except Data(DQ), Data strobes and Data masks latched on the rising edges of the clock
The used device is 4M x 8bit x 4Banks DDR SDRAM
DDR SDRAM Module 128Mbyte (16Mx64bit), based on16Mx8,4Banks,
4K Ref., SMM, Part No. HDD16M64F8
相關PDF資料 |
PDF描述 |
|---|---|
| HDD16M72D9RPW | DDR SDRAM Module 128Mbyte (16Mx72bit), based on 16Mx8, 4Banks 4K Ref., 184Pin-DIMM with PLL & Register |
| HDD16M72D9RPW-10A | DDR SDRAM Module 128Mbyte (16Mx72bit), based on 16Mx8, 4Banks 4K Ref., 184Pin-DIMM with PLL & Register |
| HDD16M72D9RPW-13A | DDR SDRAM Module 128Mbyte (16Mx72bit), based on 16Mx8, 4Banks 4K Ref., 184Pin-DIMM with PLL & Register |
| HDD16M72D9RPW-13B | DDR SDRAM Module 128Mbyte (16Mx72bit), based on 16Mx8, 4Banks 4K Ref., 184Pin-DIMM with PLL & Register |
| HDD16M72D9W | DDR SDRAM Module 128Mbyte (16Mx72bit), based on 16Mx8, 4Banks 4K Ref., 184Pin-DIMM with Unbuffered ECC |
相關代理商/技術參數 |
參數描述 |
|---|---|
| HDD16M72D9RPW | 制造商:HANBIT 制造商全稱:Hanbit Electronics Co.,Ltd 功能描述:DDR SDRAM Module 128Mbyte (16Mx72bit), based on 16Mx8, 4Banks 4K Ref., 184Pin-DIMM with PLL & Register |
| HDD16M72D9RPW-10A | 制造商:HANBIT 制造商全稱:Hanbit Electronics Co.,Ltd 功能描述:DDR SDRAM Module 128Mbyte (16Mx72bit), based on 16Mx8, 4Banks 4K Ref., 184Pin-DIMM with PLL & Register |
| HDD16M72D9RPW-13A | 制造商:HANBIT 制造商全稱:Hanbit Electronics Co.,Ltd 功能描述:DDR SDRAM Module 128Mbyte (16Mx72bit), based on 16Mx8, 4Banks 4K Ref., 184Pin-DIMM with PLL & Register |
| HDD16M72D9RPW-13B | 制造商:HANBIT 制造商全稱:Hanbit Electronics Co.,Ltd 功能描述:DDR SDRAM Module 128Mbyte (16Mx72bit), based on 16Mx8, 4Banks 4K Ref., 184Pin-DIMM with PLL & Register |
| HDD16M72D9W | 制造商:HANBIT 制造商全稱:Hanbit Electronics Co.,Ltd 功能描述:DDR SDRAM Module 128Mbyte (16Mx72bit), based on 16Mx8, 4Banks 4K Ref., 184Pin-DIMM with Unbuffered ECC |
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