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參數資料
| 型號： | HFA1110883 |
| 廠商： | Intersil Corporation |
| 英文描述： | 750MHz, Low Distortion 750MHz, Low Distortion |
| 中文描述： | 750MHz的低失真750MHz的，低失真 |
| 文件頁數： | 10/13頁 |
| 文件大小： | 104K |
| 代理商： | HFA1110883 |
10
HFA1110/883
PC Board Layout
The frequency response of this buffer depends greatly on
the amount of care taken in designing the PC board.
The
use of low inductance components such as chip resis-
tors and chip capacitors is strongly recommended,
while a solid ground plane is a must!
Attention should be given to decoupling the power supplies.
A large value (10
μ
F) tantalum in parallel with a small value
(0.1
μ
F) chip capacitor works well in most cases.
Terminated microstrip signal lines are recommended at the
input and output of the device. Capacitance directly on the
output must be minimized, or isolated as discussed in the
next section. Removing the GND plane under the output
trace helps minimize this capacitance.
An example of a good high frequency layout is the Evalua-
tion Board shown in Figure 25.
Driving Capacitive Loads
Capacitive loads, such as an A/D input, or an improperly
terminated transmission line will degrade the buffer’s phase
margin resulting in frequency response peaking and possi-
ble oscillations. In most cases, the oscillation can be avoided
by placing a resistor (R
S
) in series with the output prior to
the capacitance.
Figure 24 details starting points for the selection of this resis-
tor. The points on the curve indicate the R
S
and C
L
combina-
tions for the optimum bandwidth, stability, and settling time,
but experimental fine tuning is recommended. Picking a
point above or to the right of the curve yields an overdamped
response, while points below or left of the curve indicate
areas of underdamped performance.
R
S
and C
L
form a low pass network at the output, thus limit-
ing system bandwidth well below the buffer bandwidth of
750MHz. By decreasing R
S
as C
L
increases (as illustrated in
Figure 24), the maximum bandwidth is obtained without sac-
rificing stability. Even so, bandwidth does decrease as you
move to the right along the curve.
Evaluation Board
The performance of this buffer may be evaluated using the
HFA1110 Evaluation Board. The layout and schematic of the
board are shown in Figure 25.
To order evaluation boards, please contact your local sales
office.
TOP LAYOUT
BOTTOM LAYOUT
R
S
)
LOAD CAPACITANCE (pF)
50
45
40
35
30
25
20
15
10
5
0
0
40
80
120
160
200
240
280
320
360
400
FIGURE 24. RECOMMENDED SERIES OUTPUT RESISTOR vs
LOAD CAPACITANCE
1
50
1
2
3
4
8
7
6
5
+5V
0.1
μ
F
10
μ
F
50
OUT
0.1
μ
F
10
μ
F
-5V
HFA1110
IN
R
S
FIGURE 25. EVALUATION BOARD SCHEMATIC AND LAYOUT
Spec Number
511083-883
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|---|---|
| HFA1110IB | 750MHz, Low Distortion Unity Gain, Closed Loop Buffer |
| HFA1110EVAL | 750MHz, Low Distortion Unity Gain, Closed Loop Buffer |
| HFA1110 | 750MHz, Low Distortion Unity Gain,Closed Loop Buffer(750MHz,低失真單位增益,閉環緩沖器) |
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相關代理商/技術參數 |
參數描述 |
|---|---|
| HFA1110EVAL | 功能描述:EVALUATION PLATFORM HFA1110 RoHS:否 類別:編程器，開發系統 >> 評估板 - 運算放大器 系列:- 產品培訓模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標準包裝:1 系列:- |
| HFA1110IB | 功能描述:IC BUFFER CFA 750MHZ 8-SOIC RoHS:否 類別:集成電路 (IC) >> Linear - Amplifiers - Instrumentation 系列:- 標準包裝:50 系列:LinCMOS™ 放大器類型:通用 電路數:4 輸出類型:- 轉換速率:0.05 V/µs 增益帶寬積:110kHz -3db帶寬:- 電流 - 輸入偏壓:0.7pA 電壓 - 輸入偏移:210µV 電流 - 電源:57µA 電流 - 輸出 / 通道:30mA 電壓 - 電源，單路/雙路(±):3 V ~ 16 V，±1.5 V ~ 8 V 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:14-SOIC（0.154"，3.90mm 寬） 供應商設備封裝:14-SOIC 包裝:管件 產品目錄頁面:865 (CN2011-ZH PDF) 其它名稱:296-1834296-1834-5 |
| HFA1110IBZ | 功能描述:運算放大器 - 運放 BUFR 750MHZ CFB UNITY-GAIN IND RoHS:否 制造商:STMicroelectronics 通道數量:4 共模抑制比（最小值）:63 dB 輸入補償電壓:1 mV 輸入偏流（最大值）:10 pA 工作電源電壓:2.7 V to 5.5 V 安裝風格:SMD/SMT 封裝 / 箱體:QFN-16 轉換速度:0.89 V/us 關閉:No 輸出電流:55 mA 最大工作溫度:+ 125 C 封裝:Reel |
| HFA1110IJ | 制造商:Harris Corporation 功能描述: |
| HFA1110IP | 制造商:Rochester Electronics LLC 功能描述:850MHZ UNITY GAIN BUFFER,8 PIN PDIP - Bulk |
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