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參數資料
| 型號： | HFA1115 |
| 廠商： | Intersil Corporation |
| 英文描述： | 225MHz, Low Power, Output Limiting, Closed Loop Buffer Amplifier(225MHz、低功耗、輸出限定鎖相環緩沖器放大器) |
| 中文描述： | 225MHz?1800MHz的，低功耗，輸出限制，閉環緩沖放大器（225MHz?1800MHz的，低功耗，輸出限定鎖相環緩沖器放大器） |
| 文件頁數： | 6/14頁 |
| 文件大小： | 159K |
| 代理商： | HFA1115 |
6
Driving Capacitive Loads
Capacitive loads, such as an A/D input, or an improperly
terminated transmission line degrade the amplifier’s phase
margin resulting in frequency response peaking and
possible oscillations. In most cases, the oscillation can be
avoided by placing a resistor (R
S
) in series with the output
prior to the capacitance.
Figure 1 details starting points for the selection of this
resistor. The points on the curve indicate the R
S
and C
L
combinations for the optimum bandwidth, stability, and
settling time, but experimental fine tuning is recommended.
Picking a point above or to the right of the curve yields an
overdamped response, while points below or left of the curve
indicate areas of underdamped performance.
R
S
and C
L
form a low pass network at the output, thus
limiting system bandwidth well below the amplifier bandwidth
of 200MHz (A
V
= +1). By decreasing R
S
as C
L
increases (as
illustrated by the curves), the maximum bandwidth is
obtained without sacrificing stability. In spite of this,
bandwidth still decreases as the load capacitance increases.
For example, at A
V
= +1, R
S
= 50
, C
L
= 22pF, the overall
bandwidth is 185MHz, but the bandwidth drops to 50MHz at
A
V
= +1, R
S
= 15
, C
L
= 330pF.
Evaluation Board
The performance of the HFA1115 may be evaluated using
the HFA11XX Evaluation Board, slightly modified as follows:
1. 1.Removethe510
feedbackresistor(R
2
),andleavethe
connection open.
2. 2.a.ForA
V
=+1evaluation,removethe510
gainsetting
resistor (R
1
), and leave pin 2 floating.
b. For A
V
= +2, replace the 510
gain setting resistor with
a 0
resistor to GND.
The layout and modified schematic of the board are shown
in Figure 2.
To order evaluation boards (Part Number HFA11XXEVAL),
please contact your local sales office.
Limiting Operation
General
The HFA1115 features user programmable output clamps to
limit output voltage excursions. Limiting action is obtained by
applying voltages to the V
H
and V
L
terminals (pins 8 and 5)
of the amplifier. V
H
sets the upper output limit, while V
L
sets
the lower limit level. If the amplifier tries to drive the output
above V
H
, or below V
L
, the clamp circuitry limits the output
voltage at V
H
or V
L
(
±
the limit accuracy), respectively. The
low input bias currents of the limit pins allow them to be
driven by simple resistive divider circuits, or active elements
such as amplifiers or DACs.
Limit Circuitry
Figure 3 shows a simplified schematic of the HFA1115 input
stage, and the high limit (V
H
) circuitry. As with all current
feedback amplifiers, there is a unity gain buffer (Q
X1
- Q
X2
)
between the positive and negative inputs. This buffer forces
-IN to track +IN, and sets up a slewing current of:
I
SLEW
= (V
-IN
- V
OUT
)/R
F
+ V
-IN
/R
G
R
S
)
LOAD CAPACITANCE (pF)
50
45
40
35
30
25
20
15
10
5
0
0
40
80
120
160
200
240
280
320
360
400
FIGURE 1. RECOMMENDED SERIES RESISTOR vs LOAD
CAPACITANCE
A
V
= +1
A
V
= +2
BOARD SCHEMATIC (MODIFIED)
R
1
=
∞
(A
V
= +1) or 0
(A
V
= +2)
TOP LAYOUT
BOTTOM LAYOUT
FIGURE 2. EVALUATION BOARD SCHEMATIC (AFTER
MODIFICATION FOR BUFFER USE) AND LAYOUT
1
2
3
4
8
7
6
5
+5V
10
μ
F
0.1
μ
F
V
H
50
GND
GND
-5V
0.1
μ
F
10
μ
F
50
IN
OUT
V
L
R
1
V
H
+IN
V
L
V+
GND
1
V-
OUT
HFA1115
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