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參數(shù)資料
| 型號： | HFA1412IPZ |
| 廠商： | Intersil |
| 文件頁數(shù)： | 1/13頁 |
| 文件大小： | 0K |
| 描述： | IC BUFFER QUAD 350MHZ LP 14-PDIP |
| 標準包裝： | 250 |
| 放大器類型： | 緩沖器 |
| 電路數(shù)： | 4 |
| 轉換速率： | 1700 V/µs |
| -3db帶寬： | 350MHz |
| 電流 - 輸入偏壓： | 1µA |
| 電壓 - 輸入偏移： | 2000µV |
| 電流 - 電源： | 5.9mA |
| 電流 - 輸出 / 通道： | 55mA |
| 電壓 - 電源，單路/雙路(±)： | 9 V ~ 11 V，±4.5 V ~ 5.5 V |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 通孔 |
| 封裝/外殼： | 14-DIP（0.300"，7.62mm） |
| 供應商設備封裝： | 14-PDIP |
| 包裝： | 管件 |
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774
| Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright Intersil Americas Inc. 1998, 2005, 2006. All Rights Reserved
All other trademarks mentioned are the property of their respective owners.
HFA1412
Quad, 350MHz, Low Power,
Programmable Gain Buffer Amplifier
The HFA1412 is a quad closed loop Buffer featuring user
programmable gain and high speed video performance.
A unique feature of the HFA1412’s pinout allows the user to
select a voltage gain of +1, -1, or +2 (see the “Application
Information” section). The on-chip gain setting resistors
eliminate eight external resistors, thus saving board space or
freeing up space for termination resistors. The on-chip
feedback resistor is preset at the optimum value, and also
eliminates worries about parasitic feedback capacitance.
Additionally, the capacitance sensitive summing node is
buried inside the package where it is unaffected by PCB
parasitics. Compatibility with existing op amp pinouts
provides flexibility to upgrade low gain amplifiers, while
decreasing component count. Unlike most buffers, the
standard pinout provides an upgrade path should a higher
closed loop gain be needed at a future date.
The HFA1412 is an excellent choice for component and
composite video systems as indicated by the excellent gain
flatness, and 0.03%/0.02 Degree Differential Gain/Phase
specifications (RL = 150). Its ability to deliver a gain of +2
with no external resistors makes it particularly desirable for
applications driving double terminated cables.
For Military product, refer to the HFA1412/883 data sheet.
Features
User Programmable For Closed-Loop Gains of +1, -1 or
+2 Without Use of External Resistors
Wide -3dB Bandwidth. . . . . . . . . . . . . . . . . . . . . . 350MHz
Low Supply Current . . . . . . . . . . . . . . . . . . . . 6mA/Buffer
Excellent Gain Flatness (to 100MHz). . . . . . . . . . ±0.08dB
Low Differential Gain and Phase . . . . 0.03%/0.02 Degree
Very Fast Slew Rate . . . . . . . . . . . . . . . . . . . . . 1650V/
s
Fast Settling Time (0.1%). . . . . . . . . . . . . . . . . . . . . 28ns
High Output Current . . . . . . . . . . . . . . . . . . . . . . . . . 55mA
Excellent Gain Accuracy . . . . . . . . . . . . . . . . . . . 0.99V/V
Overdrive Recovery . . . . . . . . . . . . . . . . . . . . . . . . <10ns
Standard Operational Amplifier Pinout
Pb-Free Plus Anneal Available (RoHS Compliant)
Applications
Video Distribution Amps
Flash A/D Drivers
Video Cable Drivers
Video Switchers and Routers
Medical Imaging Systems
RGB Video Processing
High Speed Oscilloscopes and Analyzers
Pinout
HFA1412 (PDIP, SOIC)
TOP VIEW
Functional Diagram
Ordering Information
PART
NUMBER
PART
MARKING
TEMP.
RANGE
(°C)
PACKAGE
PKG.
DWG. #
HFA1412IP
-40 to 85 14 Ld PDIP
E14.3
HFA1412IPZ
(Note)
HFA1412IPZ
-40 to 85 14 Ld PDIP*
(Pb-free)
E14.3
HFA1412IB
-40 to 85 14 Ld SOIC
M14.15
HFA1412IBZ
(Note)
HFA1412IBZ
-40 to 85 14 Ld SOIC
(Pb-free)
M14.15
HA5025EVAL
DIP Evaluation Board For Quad Op
Amp
*Pb-free PDIPs can be used for through hole wave solder
processing only. They are not intended for use in Reflow solder
processing applications.
NOTE: Intersil Pb-free plus anneal products employ special Pb-free
material sets; molding compounds/die attach materials and 100%
matte tin plate termination finish, which are RoHS compliant and
compatible with both SnPb and Pb-free soldering operations. Intersil
Pb-free products are MSL classified at Pb-free peak reflow
temperatures that meet or exceed the Pb-free requirements of
IPC/JEDEC J STD-020.
OUT1
-IN1
+IN1
V+
+IN2
-IN2
OUT2
OUT4
-IN4
+IN4
V-
+IN3
-IN3
OUT3
1
2
3
4
5
6
7
14
13
12
11
10
9
8
OUT4
OUT3
-
+
OUT1
425
OUT2
1
7
8
14
2
3
6
5
9
10
13
12
-IN1
+IN1
-IN2
+IN2
-IN3
-IN4
+IN4
+IN3
-
+
425
-
+
425
-
+
425
Data Sheet
FN4152.4
January 23, 2006
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相關代理商/技術參數(shù) |
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