
4-27
A Default Register Configuration
The registers in the HFA3860B are addressed with 6-bit
numbers where the lower 2 bits of an 8-bit hexadecimal
address are left as unused. This results in the addresses being
in increments of 4 as shown in the table below. Table 14 shows
the register values for a default 802.11 configuration with dual
antennas and various rate configurations. The data is
transmitted as either DBPSK, DQPSK, BMBOK, QMBOK, or
CCK depending on the configuration chosen. It is
recommended that you start with the simplest configuration
(DBPSK) for initial test and verification of the device and/or the
radio design. The user can later modify the CR contents to
reflect the system and the required performance of each
specific application.
TABLE 14. CONTROL REGISTER VALUES FOR SINGLE ANTENNA ACQUISITION
CONFIGURATION
REGISTER
NAME
TYPE
REGISTER
ADDRESS
HEX
1/2/5.5/1
Mbps
CR0
Part / Version Code
R
00
03
CR1
I/O Polarity
R/W
04
00
CR2
TX & RX Control
R/W
08
14
CR3
A/D_CAL_POS Register
R/W
0C
01
CR4
A/D_CAL_NEG Register
R/W
10
FF
CR5
CCA Antenna Control
R/W
14
2C
CR6
Preamble Length
R/W
18
80
CR7
Scramble_Tap (RX and TX)
R/W
1C
48
CR8
RX_SQ1_ ACQ (High) Threshold
R/W
20
01
CR9
RX-SQ1_ ACQ (Low) Threshold
R/W
24
88
CR10
RX_SQ2_ ACQ (High) Threshold
R/W
28
00
CR11
RX-SQ2_ ACQ (Low) Threshold
R/W
2C
98
CR12
SQ1 CCA Thresh (High)
R/W
30
01
CR13
SQ1 CCA Thresh (Low)
R/W
34
98
CR14
ED or RSSI Thresh
R/W
38
20
CR15
SFD Timer
R/W
3C
90
CR16 (Note 6)
Signal Field (BPSK - 11 Chip Barker Sequence)/or Q Cover Code for
CCK Modulation
R/W
40
0A/
48
CR17 (Note 6)
Signal Field (QPSK - 11 Chip Barker Sequence)/or I Cover Code for
CCK Modulation
R/W
44
14/
48
CR18
Signal Field (BPSK - Mod Walsh Sequence)
R/W
48
37
CR19
Signal Field (QPSK - Mod Walsh Sequence)
R/W
4C
6E
CR20
TX Signal Field
R/W
50
00/01/02/03
CR21
TX Service Field
R/W
54
00
CR22
TX Length Field (High)
R/W
58
FF
CR23
TX Length Field (Low)
R/W
5C
FF
CR24
RX Status
R
60
X
CR25
RX Service Field Status
R
64
X
CR26
RX Length Field Status (High)
R
68
X
CR27
RX Length Field Status (Low)
R
6C
X
CR28
Test Bus Address
R/W
70
00
CR29
Test Bus Monitor
R
74
X
CR30
Test Register 1
R/W
78
00
CR31
RX Control MBOK/CCK
R/W
7C
00
NOTE:
6. To provide CCK functionality, these registers must be programmed in two passes. Once with CR5 bit 7 as a 0 and once with it as a 1.
HFA3860B