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| 型號： | HFCT-5202 |
| 英文描述： | 155 Mb/s Single Mode Fiber Transceiver with Integrated Clock and Data Recovery for ATM, SONET OC-3/SDH STM-1(應(yīng)用于ATM, SONET OC-3/SDH STM-1帶集成時(shí)鐘和數(shù)據(jù)恢復(fù)的155 Mb/s單模式光收發(fā)器) |
| 中文描述： | 155 Mb / s的對ATM，SONET的OC-3/SDH的STM - 1單模光纖收發(fā)器（應(yīng)用于自動(dòng)取款機(jī)，SONET的OC-3/SDH的STM - 1帶集成時(shí)鐘和數(shù)據(jù)恢復(fù)的155 MB的集成的時(shí)鐘和數(shù)據(jù)恢復(fù)/擰單模式光收發(fā)器） |
| 文件頁數(shù)： | 1/12頁 |
| 文件大小： | 170K |
| 代理商： | HFCT-5202 |
Features
1300 nm Single Mode
Transceiver for Links up to
15 Km
Compliant with ATM Forum
155.52 Mb/s Physical Layer
Specification
AF-PHY-0046.000
Compliant with Specifica-
tions Proposed to ANSI
T1E1.2 Committee for
Inclusion in T1.646-1995
Broadband ISDN and
T1E1.2/96-002 SONET
Network to Customer
Installation Interface
Standards
Compliant with ANSI
T1.105.06 SONET Physical
Layer Specifications
Standard
Multisourced 2 x 9 Pin-out
Package Style
Integral Duplex SC
Connector Receptacle
Compliant with TIA/EIA and
IEC Standards
Single +5 V Power Supply
Operation and PECL Logic
Interfaces
Incorporates Hewlett-
Packard’s Eyesafe Laser
Subassembly
Integral Digital PLL
Provides Regenerated
Differential Clock Output
Integral Decision Circuit
Provides Retimed
Differential Data Output
Laser Bias Monitor, Refer-
ence Clock, Transmitter
Disable and Laser Power
Monitor Functions
Two Temperature Ranges:
0
°
C to +70
°
C - HFCT-5202B/D
–40
°
C to +85
°
C – HFCT-
5202A/C
Wave Solder and Aqueous
Wash Process Compatible
Manufactured in an ISO
9001 Certified Facility
Applications
ATM 155 Mb/s Links
SONET OC-3/SDH STM-1
Interconnections
155 Mb/s Single Mode Fiber
Transceiver with Integrated
Clock and Data Recovery for
ATM, SONET OC-3/SDH STM-1
Technical Data
HFCT-5202
Description
General
The HFCT-5202 is a 1300 nm
laser-based duplex SC receptacle
2 x 9 transceiver with integral
clock and data recovery circuits.
It provides a cost-effective
solution to medium haul 155 Mb/s
data link requirements.
This compact transceiver requires
a single +5 V source and contains
the following data, clock and
monitoring features as depicted
in Figure 1: differential data
input, differential retimed data
output, recovered clock output,
signal detect, laser bias monitor,
transmitter disable, and an option
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