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參數(shù)資料
| 型號： | HG74ALVC16835C |
| 廠商： | Hynix Semiconductor Inc. |
| 英文描述： | 18-BIT UNIVERSAL BUS DRIVER WITH 3-STATE OUTPUTS |
| 中文描述： | 18位通用總線驅動器，三態(tài)輸出 |
| 文件頁數(shù)： | 5/7頁 |
| 文件大小： | 135K |
| 代理商： | HG74ALVC16835C |
18-BIT UNIVERSAL BUS DRIVER
HG74ALVC16835C
WITH 3-STATE OUTPUTS
Jan 1999
Copyright1999, Hyundai Electronics Industries Co., Ltd.
ELECTRONICS
5
Voltage Waveforms
Note 1 )Waveform1 is for an output with internal conditions such that the output is low except when disabled by the output control.
Waveform2 is for an output with internal conditions such that the output is high except when disabled
by the output control
Note 2) All input pulses are supplied by generators having the following characteristics:
PRR
10Mhz, Z
= 50
, t
2ns, t
2ns.
Note 3) The output are measured one at a time with one transition per measurement.
Note 4) t
PLZ
and t
PHZ
are the same as t
dis
.
Note 5) t
PZL
and t
PZH
are the same as t
en
.
Note 6) t
PLH
and t
PHL
are the same as t
pd
.
Timing
Input
Data
Input
V
CC
/2
t
su
t
h
Figure 2. Set up and Hold Times
V
CC
0V
V
CC
/2
V
CC
/2
Figure 3. Pulse Duration
Input
Output
t
PLH
t
PHL
V
CC
/2
V
CC
/2
V
CC
/2
V
CC
/2
V
OH
V
OL
Output Control
(Low-level enabling)
Output Waveform 1
S1 at 2 x V
CC
(See Note 1 )
Output Waveform 2
S1 at GND
(See Note 1 )
V
CC
/2
V
CC
/2
t
PZL
V
CC
/2
V
OL
+
0.15V
V
OH
-
0.15V
V
CC
0V
V
OL
V
OH
0V
Figure 5. Enable and Disable Times
V
CC
/2
t
PZH
t
PLZ
t
PHZ
V
CC
0V
t
w
V
CC
/2
V
CC
/2
V
CC
0V
V
CC
0V
Figure 4. Propagation Delay times
V
CC
Input
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