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參數資料
| 型號： | HI-8010JF-85 |
| 廠商： | HOLT INTEGRATED CIRCUITS INC |
| 元件分類： | 顯示驅動器 |
| 英文描述： | CMOS HIGH VOLTAGE DISPLAY DRIVER |
| 中文描述： | LIQUID CRYSTAL DISPLAY DRIVER, PQCC44 |
| 封裝： | ROHS COMPLIANT, PLASTIC, LCC-44 |
| 文件頁數： | 2/9頁 |
| 文件大?。?/td> | 120K |
| 代理商： | HI-8010JF-85 |
FUNCTIONAL DESCRIPTION
Whenever a Logic "0" is applied to the Chip Select (
input,onebitofdataisclockedintotheshiftregisterfromthe
serial data input (DIN) with each negative transition of the
Clock (
) input.
is internally tied to VSS on some
versions. A Logic "1" present at the Load (LD) input will
cause a parallel transfer of data from the shift register to the
data latch. If the Load (LD) input is held high while data is
clocked into the shift register, the latch will be transparent.
All four logic inputs are TTL compatible on the HI-8010 and
CMOScompatibleontheHI-8110.
)
To display segments, a Logic "1" is stored in the appropriate
shift register bit position, and the segment output is out-of-
phasewiththebackplane.
The backplane output functions in 1 of 2 modes; externally
drivenorself-oscillating. WhentheLCDinputisexternally
driven with the LCDOPT input open circuit (Figure 2), the
backplane output will be in-phase with LCD. Utilizing the
self-oscillating mode, inputs LCD and LCDOPT are tied
together and connected to an RC circuit (Figure 3).
A 150K
resistor with a 470pF capacitor generates an
approximate backplane frequency of 100Hz. The
LCD/LCDOPT oscillator frequency is divided by 256 to
determine the backplane output frequency.
value (R) must be at least 30K
operation.
The resistor
for proper self-oscillator
For displays having a number of segments greater than 38,
twoormoreofthedisplaydriversmaybecascadedtogether
by connecting the serial data output (DOUT) from the first
driver, to the serial data input (DIN) of the following driver,
etc. (See Figures 2 & 3). Data out (DOUT) will change state
CS
CL
CS
HI-8010/HI-8110 Series
INTERNAL OSCILLATOR CIRCUIT
TO BACKPLANE
TRANSLATOR
AND DRIVER
÷ 256
C
R
LCD
OPT
LCD
Figure 1
Q
on the rising edge of the Clock (
and Chip Select (
other,respectively,betweenallcascadeddisplaydrivers.
). Clock (
), Load (LD)
) should be tied in common with each
CL
CL
CS
HOLT INTEGRATED CIRCUITS
2
SYMBOL
FUNCTION
DESCRIPTION
VSS
POWER
0 Volts
INPUT
Logic input
Chip select
INPUT
Logic input
Clocks shift register on negative edge and DOUT pins on positive edge
LD
INPUT
Logic input
Segment outputs equal shift register data if Load is high
DIN
INPUT
Logic input
Shift register data input
LCD0
INPUT
Analog input
Display clock input and is always bonded out. Can swing from VEE to VDD
LCD0OPT
OUTPUT
Analog output
Bonded out only if an RC oscillator is required
VDD
POWER
5 Volts
VEE
POWER
0 Volts to -30 Volts
DOUT
OUTPUT
Logic output
Selected pinout can provide shift register taps at positions 30, 32, 34, or 38
BP
OUTPUT
Display drive output
Low resistance drive for the backplane and swings from VDD to VEE
Segments
OUTPUT
Display drive output
High resistance drive for each segment and swings from VDD to VEE
CS
CL
PIN DESCRIPTIONS
相關PDF資料 |
PDF描述 |
|---|---|
| HI-8010PQIF | CMOS HIGH VOLTAGE DISPLAY DRIVER |
| HI-8010PQTF | CMOS HIGH VOLTAGE DISPLAY DRIVER |
| HI-8110JF-85 | CMOS HIGH VOLTAGE DISPLAY DRIVER |
| HI-8110QI | CMOS HIGH VOLTAGE DISPLAY DRIVER |
| HI-8110QIF | CMOS HIGH VOLTAGE DISPLAY DRIVER |
相關代理商/技術參數 |
參數描述 |
|---|---|
| HI-8010P-03 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Interface IC |
| HI-8010P-04 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Interface IC |
| HI-8010PQ | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Interface IC |
| HI-8010PQI | 制造商:HOLTIC 制造商全稱:Holt Integrated Circuits 功能描述:CMOS HIGH VOLTAGE DISPLAY DRIVER |
| HI-8010PQIF | 制造商:HOLTIC 制造商全稱:Holt Integrated Circuits 功能描述:CMOS HIGH VOLTAGE DISPLAY DRIVER |
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