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參數(shù)資料
| 型號(hào)： | HI-8588CRM-10 |
| 廠商： | HOLT INTEGRATED CIRCUITS INC |
| 元件分類： | 通用總線功能 |
| 英文描述： | ARINC 429 LINE RECEIVER |
| 中文描述： | LINE RECEIVER, CDIP8 |
| 封裝： | CERDIP-8 |
| 文件頁數(shù)： | 1/6頁 |
| 文件大小： | 125K |
| 代理商： | HI-8588CRM-10 |
HI-8588-10
ARINC 429 LINE RECEIVER
DESCRIPTION
FEATURES
PIN CONFIGURATION
SUPPLY VOLTAGES
FUNCTION TABLE
RINA
GND
ROUTA
ROUTB
TESTB
TESTA
VCC
RINB
2
3
4
5
6
7
8
1
vcc
= 5.0V ± 5%
PIN
SYMBOL
VCC
TESTA
RINB
RINA
GND
ROUTA
ROUTB
TESTB
FUNCTION
SUPPLY
LOGIC INPUT
ARINC INPUT
ARINC INPUT
POWER
LOGIC OUTPUT
LOGIC OUTPUT
LOGIC INPUT
DESCRIPTION
5 VOLT SUPPLY
CMOS
RECEIVER B INPUT
RECEIVER A INPUT
GROUND
RECEIVER CMOS OUTPUT A
RECEIVER CMOS OUTPUT B
CMOS
PIN DESCRIPTION TABLE
The HI-8588-10 ARINC 429 bus interface receiver is simi-
lar to the HI-8588 with the exception that it allows an exter-
nal 10 Kohm resistor in series with each ARINC input with-
out affecting the ARINC input thresholds. The product is
especially useful in applications where lightning protection
circuitry is also required. In addition, the test inputs force
both of the outputs to zero instead open circuit. The ana-
log/digital CMOS product requires only a 5 volt supply and
isavailableinaSO8pinpackage.
Each side of the ARINC bus
10 Kohm series resistor in order for the chip to detect the
correct ARINC levels. The typical 10 volt differential signal
is translated and input to a window comparator and latch.
The comparator levels are set so that with the external
10 Kohm resistorsthey are just below the standard 6.5 volt
minimum ARINC data threshold and just above the stan-
dard2.5voltmaximumARINCnullthreshold.
be connected through a
The TESTA and TESTB inputs bypass the analog inputs
for testing purposes. Also if TESTA and TESTB are both
takenhigh,thedigitaloutputsareforcedtozero.
must
January 2001
(DS8588-10 Rev. A)
01/01
HOLT INTEGRATED CIRCUITS
1
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