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參數(shù)資料
| 型號(hào)： | HI-8685PJI-10 |
| 廠商： | HOLT INTEGRATED CIRCUITS INC |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | ARINC INTERFACE DEVICE ARINC 429& 561 SERIAL DATA TO 16-BIT PARALLEL DATA |
| 中文描述： | 1 CHANNEL(S), SERIAL COMM CONTROLLER, PQCC28 |
| 封裝： | PLASTIC, LCC-28 |
| 文件頁(yè)數(shù)： | 1/10頁(yè) |
| 文件大小： | 239K |
| 代理商： | HI-8685PJI-10 |
HI-8685, HI-8686
ARINC INTERFACE DEVICE
ARINC 429 & 561 Serial Data to 16-Bit Parallel Data
DESCRIPTION
The HI-8685 and HI-8686 are system components for
interfacing incoming ARINC 429 signals to 16-bit parallel
data using proven +5V analog/digital CMOS technology.
Both products incorporate the digital logic and analog line
receivercircuitryinasingledevice.
The receivers on the HI-8685 and the HI-8686 connect
directly to the ARINC 429 Bus and translate the incoming
signals to normal CMOS levels. Internal comparator levels
are set just below the standard 6.5 volt minimum data
thresholdandjustabovethestandard2.5voltmaximumnull
threshold.
The -10 version of the HI-8685 allows the
incorporation of an external 10K
each ARINC input for lightning protection without affecting
ARINCleveldetection.
resistance in series with
Both products offer high speed 16-bit parallel bus interface,
a32-bitbuffer,anderrordetectionforwordlengthandparity.
Aresetpinisalsoprovidedforpower-oninitialization.
!
!
Automatic conversion of serial ARINC 429, 575 &
561 data to 16-bit parallel data
High speed parallel 16-bit data bus
Error detection -
and
On-chip line receiver
Input hysteresis of at least 2 volts
Test lnputs bypass analog inputs
Simplified lightning protection with the ability to add
10 Kohm external series resistors
Small,
SOIC, TQFP and PLCC
package options:
Military processing available
!
!
!
!
!
!
!
!
word length
parity
Reset input for power-on initialization
surface mount, plastic
FEATURES
PIN CONFIGURATIONS
(Top View)
February 2001
HI-8685
28-Pin Plastic SOIC - WB Package
HI-8686
32-Pin PlasticTQFP Package
HI-8686PQI
HI-8686PQT
24 -
23 - RINB-10
22 - RINB
21 - RINA
20 - RINA-10
19 - ERROR
18 - PARITY ENB
17 - N/C
RESET
HI-8685PSI
HI-8685PST
&
HI-8685PSI-10
HI-8685PST-10
DATARDY
D15
D14
D13
D12
D11
D10
D9
D8
D7
D6
D5
D4
GND
Vcc
GAPCLK
TESTA
TESTB
RINB(-10)
RINA(-10)
ERROR
PARITYENB
D0
D1
D2
D3
RESET
READ
28
27
26
25
24
23
22
21
20
19
18
17
16
15
1
2
3
4
5
6
7
8
9
10
11
12
13
14
N/C - 1
D12 - 2
D11 - 3
D10 - 4
D9 - 5
D8 - 6
D7 - 7
D6 - 8
HOLT INTEGRATED CIRCUITS
1
(DS8685 Rev. G)
02/01
(See page 8 for additional pin configurations)
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| HI-8685PJT-10 | ARINC INTERFACE DEVICE ARINC 429& 561 SERIAL DATA TO 16-BIT PARALLEL DATA |
| HI-8685 | 384 MCELL 3 VOLT ZERO POWER ISP CPLD - NOT RECOMMENDED for NEW DESIGN |
| HI-8685PJT | ARINC INTERFACE DEVICE ARINC 429& 561 SERIAL DATA TO 16-BIT PARALLEL DATA |
| HI-8685PSI | ARINC INTERFACE DEVICE ARINC 429& 561 SERIAL DATA TO 16-BIT PARALLEL DATA |
| HI-8685PSI-10 | 384 MCELL 3 VOLT ZERO POWER ISP CPLD - NOT RECOMMENDED for NEW DESIGN |
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