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參數資料
型號: HI3304JIB
廠商: INTERSIL CORP
元件分類: ADC
英文描述: 4-Bit, 25 MSPS, Flash A/D Converter
中文描述: 1-CH 4-BIT FLASH METHOD ADC, PARALLEL ACCESS, PDSO16
封裝: SOIC-16
文件頁數: 1/12頁
文件大小: 117K
代理商: HI3304JIB
4-1424
August 1997
HI3304
4-Bit, 25 MSPS, Flash A/D Converter
Features
CMOS Low Power (Typ). . . . . . . . . . . . . . . . . . . . 35mW
Parallel Conversion Technique
Single Power Supply Voltage . . . . . . . . . . . . 3V to 7.5V
Sampling Rate at 5V Supply . . . . . . . . . . . . . . . . . 25MHz
4-Bit Latched Three-State Output with Overflow and
Data Change Outputs
Maximum Nonlinearity. . . . . . . . . . . . . . . . . . . .
1
/
8
LSB
Inherent Resistance to Latch-Up
Bipolar Input Range with Optional Second Supply
Input Bandwidth (Typ) . . . . . . . . . . . . . . . . . . . . . 40MHz
Linearity (INL, DNL):
- HI3304JIP . . . . . . . . . . . . . . . . . . . . . . . . . .
±
0.25 LSB
- HI3304JIB . . . . . . . . . . . . . . . . . . . . . . . . . .
±
0.25 LSB
Sampling Rate:
- HI3304JIP . . . . . . . . . . . . . . . . . . . . . . . 25MHz (40ns)
- HI3304JIB . . . . . . . . . . . . . . . . . . . . . . . 25MHz (40ns)
Applications
Video Digitizing
High Speed Data Acquisition
Digital Communication Systems
Radar Signal Processing
Description
The Intersil HI3304 is a CMOS parallel (FLASH) analog-to-
digital converter designed for applications demanding both
low-power consumption and high speed digitization. Digitiz-
ing at 25MHz, for example, requires only about 35mW.
The HI3304 operates over a wide, full-scale signal input volt-
age range of 0.5V up to the supply voltage. Power consump-
tion is as low as 10mW, depending upon the clock frequency
selected.
Sixteen paralleled auto-balanced voltage comparators mea-
sure the input voltage with respect to a known reference to
produce the parallel-bit outputs in the HI3304. Fifteen com-
parators are required to quantize all input voltage levels in
this 4-bit converter, and the additional comparator is required
for the overflow bit. A data change pin indicates when the
present output differs from the previous, thus allowing com-
paction of data storage.
Ordering Information
Pinout
HI3304
(PDIP, SOIC)
TOP VIEW
PART NUMBER
TEMP.
RANGE (
o
C)
PACKAGE
PKG. NO.
HI3304JIP
-40 to 85
16 Ld PDIP
E16.3
HI3304JIB
-40 to 85
16 Ld SOIC
M16.3
14
15
16
9
13
12
11
10
1
2
3
4
5
7
6
8
BIT 1 (LSB)
BIT 2
BIT 3
BIT 4
DATA CHANGE (DC)
OVERFLOW (OF)
V
SS
CE2
V
DD
V
AA
-
V
REF
-
V
REF
+
V
IN
V
AA
+
CE1
CLK
File Number
4137.1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143 | Copyright Intersil Corporation 1999
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