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參數(shù)資料
型號: HI5800BID
廠商: INTERSIL CORP
元件分類: ADC
英文描述: 12-Bit, 3MSPS, Sampling A/D Converter
中文描述: 1-CH 12-BIT FLASH METHOD ADC, PARALLEL ACCESS, CDIP40
封裝: SIDE BRAZED, CERAMIC, DIP-40
文件頁數(shù): 5/15頁
文件大小: 234K
代理商: HI5800BID
5
Data Access from OE Low, t
12
LSB, Nibble Delay from A0 High, t
13
MSB Delay from A0 Low, t
14
CS to Float Delay, t
15
Minimum CS Pulse, t
16
CS to Data Valid Delay, t
17
Output Fall 2 Time, t
f
Output Rise Time, t
r
POWER SUPPLY CHARACTERISTICS
(Note 3)
10
18
25
10
18
25
ns
(Note 3)
-
10
20
-
10
20
ns
(Note 3)
-
14
20
-
14
20
ns
(Note 3)
10
18
25
10
18
25
ns
(Notes 3, 5)
15
-
-
15
-
-
ns
(Note 3)
10
18
25
10
18
25
ns
(Note 3)
-
5
20
-
5
20
ns
(Note 3)
-
5
20
-
5
20
ns
IV
CC
IV
EE
IDV
CC
IDV
EE
Power Dissipation
-
170
220
-
170
220
mA
-
150
190
-
150
190
mA
-
24
40
-
24
40
mA
-
2
5
-
2
5
mA
-
1.7
2.2
-
1.7
2.2
W
PSRR
V
CC
, V
EE
±
5%
-
0.01
-
-
0.01
-
%/%
NOTES:
2. Dissipation rating assumes device is mounted with all leads soldered to printed circuit board.
3. Parameter guaranteed by design or characterization and not production tested.
4. Recommended pulse width for CONV is 60ns.
5. Recommended minimum pulse width is 25ns.
6. This is the additional current available from the REF
OUT
pin with the REF
OUT
pin driving the REF
IN
pin.
7. The A0 pin V
IH
at -40
o
C may exceed 2.0V by up to 0.4V at initial power up.
8. Excludes error due to internal reference temperature drift.
Electrical Specifications
AV
CC
= +5V, DV
CC
= +5V, AV
EE
= -5V, DV
EE
= -5V; Internal Reference Used,
Unless Otherwise Specified
(Continued)
PARAMETER
TEST CONDITIONS
HI5800JCD
HI5800KCD, HI5800BID
0
o
C TO 70
o
C
-40
o
C TO 85
o
C
UNITS
0
o
C TO 70
o
C
MIN
TYP
MAX
MIN
TYP
MAX
Timing Diagrams
FIGURE 1. SINGLE SHOT TIMING
N - 1 DATA
ACQUIRE N
D0 - D11, OVF
OE
AO
DATA VALID
CONV
CS
IRQ
t
1
t
8
t
16
t
12
t
17
t
15
t
7
N CONVERSION
N DATA
N DATA
HI5800
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