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參數資料
型號: HI5810JIP
廠商: INTERSIL CORP
元件分類: ADC
英文描述: CMOS 10 Microsecond, 12-Bit, Sampling A/D Converter with Internal Track and Hold
中文描述: 1-CH 12-BIT SUCCESSIVE APPROXIMATION ADC, PARALLEL ACCESS, PDIP24
封裝: PLASTIC, DIP-24
文件頁數: 1/12頁
文件大小: 423K
代理商: HI5810JIP
6-1777
August 1997
HI5810
CMOS 10 Microsecond, 12-Bit, Sampling
A/D Converter with Internal Track and Hold
Features
Conversion Time . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
μ
s
Throughput Rate . . . . . . . . . . . . . . . . . . . . . . .100 KSPS
Built-In Track and Hold
Single Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . .+5V
Maximum Power Consumption. . . . . . . . . . . . . . .40mW
Internal or External Clock
1MHz Input Bandwidth . . . . . . . . . . . . . . . . . . . . . -3dB
Applications
Remote Low Power Data Acquisition Systems
Digital Audio
DSP Modems
General Purpose DSP Front End
μ
P Controlled Measurement Systems
Process Controls
Industrial Controls
Description
The HI5810 is a fast, low power, 12-bit, successive-
approximation, analog-to-digital converter. It can operate from
a single 3V to 6V supply and typically draws just 1.9mA when
operating at 5V. The HI5810 features a built-in track and hold.
The conversion time is as low as 10
μ
s with a 5V supply.
The twelve data outputs feature full high speed CMOS three-
state bus driver capability, and are latched and held through a
full conversion cycle. The output is user selectable: [i.e.,
12-bit, 8-bit (MSBs), and/or 4-bit (LSBs)]. A data ready flag,
and conversion-start input complete the digital interface.
An internal clock is provided and is available as an output.
The clock may also be over-driven by an external source.
Pinout
HI5810
(PDIP, CERDIP, SOIC)
TOP VIEW
Ordering Information
PART
NUMBER
INL (LSB)
(MAX OVER
TEMP.)
TEMP.
RANGE
(
o
C)
PACKAGE
PKG.
NO.
HI5810JIP
±
2.5
-40 to 85
24 Ld PDIP
E24.3
HI5810KIP
±
2.0
-40 to 85
24 Ld PDIP
E24.3
HI5810JIB
±
2.5
-40 to 85
24 Ld SOIC
M24.3
HI5810KIB
±
2.0
-40 to 85
24 Ld SOIC
M24.3
HI5810JIJ
±
2.5
-40 to 85
24 Ld CERDIP F24.3
HI5810KIJ
±
2.0
-40 to 85
24 Ld CERDIP F24.3
DRDY
(LSB) D0
D1
D2
D3
D4
D5
D6
D7
D8
D9
V
SS
V
DD
OEL
CLK
STRT
V
REF
-
V
REF
+
V
IN
V
AA
+
V
AA
-
OEM
D11 (MSB)
D10
1
2
3
4
5
6
7
8
9
10
11
12
16
17
18
19
20
21
22
23
24
15
14
13
File Number
3633.1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143 | Copyright Intersil Corporation 1999
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