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參數資料
| 型號： | HIP5060DY |
| 廠商： | INTERSIL CORP |
| 元件分類： | 穩壓器 |
| 英文描述： | FPGA 1000000 SYSTEM GATE 1.8 VOLT - NOT RECOMMENDED for NEW DESIGN |
| 中文描述： | 20 A SWITCHING REGULATOR, 1100 kHz SWITCHING FREQ-MAX, UUC37 |
| 封裝： | DIE-37 |
| 文件頁數： | 4/6頁 |
| 文件大小： | 615K |
| 代理商： | HIP5060DY |
4
CURRENT CONTROLLED PWM (Continued)
I
TH
IRFO
Voltage at IRFO to enable SHRT
output current. This is due to
Regulator Over Current Condi-
tion
7.4
-
8.0
V
I
SHRT
SHRT Output Current, During
Over-Current
V
IRFO
= 8.1V
-37
-
-17
μ
A
V
TH
SHRT
Threshold voltage on SHRT to
set FLTN latch
4
6
8
V
I
GAIN
I
PEAK
(DMOS
DRAIN
)/I
IRFI
I (DMOS
DRAIN
)/
t = 1A/ms
3.8
-
4.9
A/mA
R
IRFI
IRFI Resistance to GND
I
IRFI
= 2mA
150
-
360
t
RS
(Note 1)
Current Comparator Response
Time
I (DMOS
DRAIN
)/
t > 1A/
μ
s
-
30
-
ns
MCPW (Note
1)
Minimum Controllable Pulse
Width
25
50
100
ns
MCPI
(Note 1)
Minimum Controllable DMOS
Peak Current
200
400
800
mA
START-UP
V+
Rising V+ Power-On Reset
Voltage
22
-
27
V
V+
Falling V+ Power-Off Set
Voltage
-
15
-
V
V+
V+ Power-On Hysteresis
9
-
12
V
V
TH
PSEN
Voltage at PSEN to Enable
Supply
0.8
-
2.0
V
r
PSEN
Internal Pull-Up Resistance, to
5.1V
-
20
-
K
I
SFST
Soft-Start Charging Current
V
SFST
= 0V to 10V
-1.0
-0.7
-0.4
μ
A
I
PSOK
PSOK High-State Leakage
Current
SFST = 0V, PSOK = 12V
-1
-
1
μ
A
V
PSOK
PSOK Low-State Voltage
SFST = 11V, I
PSOK
= 1mA
-
-
0.4
V
V
TH
SFST
PSOK Threshold, Rising V
SFST
9.4
-
11
V
THERMAL MONITOR
TEMP
(Note 1)
Substrate Temperature for
Thermal Monitor to Trip
TMON pin open
105
-
135
o
C
NOTE:
1. Determined by design, not a measured parameter.
Electrical Specifications
V+ = 36V, T
J
= 0
o
C to +110
o
C; Unless Otherwise Specified
(Continued)
SYMBOL
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNITS
HIP5060
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相關代理商/技術參數 |
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|---|---|
| HIP5060DY DIE | 制造商:Harris Corporation 功能描述: |
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