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參數資料
| 型號： | HIP6502CB |
| 廠商： | INTERSIL CORP |
| 元件分類： | 電源管理 |
| 英文描述： | Multiple Linear Power Controller with ACPI Control Interface |
| 中文描述： | 9-CHANNEL POWER SUPPLY SUPPORT CKT, PDSO20 |
| 封裝： | PLASTIC, MS-013-AC, SOIC-20 |
| 文件頁數： | 11/14頁 |
| 文件大小： | 147K |
| 代理商： | HIP6502CB |
11
A multi-layer printed circuit board is recommended. Figure 9
shows the connections of most of the components in the
converter. Note that the individual capacitors shown each
could represent numerous physical capacitors. Dedicate one
solid layer for a ground plane and make all critical
component ground connections through vias placed as close
to the component terminal as possible. Dedicate another
solid layer as a power plane and break this plane into
smaller islands of common voltage levels. Ideally, the power
plane should support both the input power and output power
nodes. Use copper filled polygons on the top and bottom
circuit layers to create power islands connecting the filtering
components (output capacitors) and the loads. Use the
remaining printed circuit layers for small signal wiring.
Component Selection Guidelines
Output Capacitors Selection
The output capacitors for all outputs should be selected to
allow the output voltage to meet the dynamic regulation
requirements of active state operation (S0, S1). The load
transient for the various microprocessor system’s
components may require high quality capacitors to supply
the high slew rate (di/dt) current demands. Thus, it is
recommended that the output capacitors be selected for
transient load regulation, paying attention to their parasitic
components (ESR, ESL).
Also, during the transition between active and sleep states,
there is a short interval of time during which none of the
power pass elements are conducting - during this time the
output capacitors have to supply all the output current. The
output voltage drop during this brief period of time can be
easily approximated with the following formula:
×
=
, where
V
OUT
- output voltage drop
ESR
OUT
- output capacitor bank ESR
I
OUT
- output current during transition
C
OUT
- output capacitor bank capacitance
t
t
- active-to-sleep or sleep-to-active transition time (10
μ
s typ.)
The output voltage drop is heavily dependent on the ESR
(equivalent series resistance) of the output capacitor bank,
the choice of capacitors should be such as to maintain the
output voltage above the lowest allowable regulation level.
V
CLK
(V
OUT4
) Output Capacitors Selection
The output capacitor for the V
CLK
linear regulator provides
loop stability. Figure 10 outlines a capacitance vs. equivalent
series resistance envelope. For stable operation and
optimized performance, select a C
OUT4
capacitor or
combination of capacitors with characteristics within the
shown envelope.
Input Capacitors Selection
The input capacitors for an HIP6502 application have to
have a sufficiently low ESR as to not allow the input voltage
to dip excessively when energy is transferred to the output
capacitors. If the ATX supply does not meet the
specifications, certain imbalances between the ATX’s
outputs and the HIP6502’s regulation levels could have as a
L
V
OUT1
C
HF1
L
FIGURE 9. PRINTED CIRCUIT BOARD ISLANDS
V
OUT3
Q1
Q2
Q3
Q4
C
SS
+12V
IN
+5V
SB
C
IN
VIA CONNECTION TO GROUND PLANE
ISLAND ON POWER PLANE LAYER
ISLAND ON CIRCUIT/POWER PLANE LAYER
C
BULK2
HIP6502
C
12V
V
OUT2
V
OUT5
SS
GND
VSEN2
5VDLSB
DRV2
3V3DLSB
KEY
12V
5VSB
DLA
Q5
C
BULK5
L
C
5VSB
L
L
C
HF3
C
HF5
5VDL
+5V
IN
C
HF2
+3.3V
IN
3V3DL
5V
3V3
VSEN1
C
BULK4
C
HF4
C
BULK1
VCLK
Q6
C
BULK3
V
OUT
I
OUT
ESR
OUT
t
OUT
---------------
+
FIGURE 10. C
OUT4
OUTPUT CAPACITOR
E
)
1
0.1
10
0.01
CAPACITANCE (
μ
F)
10
100
1000
HIP6502
相關PDF資料 |
PDF描述 |
|---|---|
| HIP6503EVAL1 | Multiple Linear Power Controller with ACPI Control Interface |
| HIP6503CB | Circular Connector; No. of Contacts:37; Series:MS27467; Body Material:Aluminum; Connecting Termination:Crimp; Connector Shell Size:15; Circular Contact Gender:Socket; Circular Shell Style:Straight Plug; Insert Arrangement:15-35 |
| HIP6503 | Multiple Linear Power Controller with ACPI Control Interface(集成了多個線性電源控制器的芯片（ACPI控制接口）) |
| HIP6602ACB | FPGA 1600000 SYSTEM GATE 1.8 VOLT - NOT RECOMMENDED for NEW DESIGN |
| HIP6602ACR | FPGA 1600000 SYSTEM GATE 1.8 VOLT - NOT RECOMMENDED for NEW DESIGN |
相關代理商/技術參數 |
參數描述 |
|---|---|
| HIP6502CB-T | 制造商:Rochester Electronics LLC 功能描述:- Tape and Reel |
| HIP6502EVAL1 | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:Multiple Linear Power Controller with ACPI Control Interface |
| HIP6503 | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:Multiple Linear Power Controller with ACPI Control Interface |
| HIP6503_05 | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:Multiple Linear Power Controller with ACPI Control Interface |
| HIP6503CB | 制造商:Rochester Electronics LLC 功能描述:ACPI POWER MANAGEMENT CIRCUIT,20LD SOIC - Bulk 制造商:Intel 功能描述:9-CHANNEL POWER SUPPLY SUPPORT CKT, PDSO20 制造商:Intersil Corporation 功能描述:9-CHANNEL POWER SUPPLY SUPPORT CKT, PDSO20 |
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