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參數資料
| 型號： | HM51S4260CLJ-6R |
| 廠商： | Hitachi,Ltd. |
| 英文描述： | 262,144-word x 16-bit Dynamic Random Access Memory |
| 中文描述： | 262,144字× 16位動態隨機存取存儲器 |
| 文件頁數： | 1/27頁 |
| 文件大小： | 260K |
| 代理商： | HM51S4260CLJ-6R |
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HM514260C Series
HM51S4260C Series
262,144-word
×
16-bit Dynamic Random Access Memory
ADE-203-260A (Z)
Rev. 1.0
Jun. 12, 1995
Description
The Hitachi HM51(S)4260C is CMOS dynamic RAM organized as 262,144-word
×
16-bit. HM51(S)4260C
has realized higher density, higher performance and various functions by employing 0.8
μ
m CMOS process
technology and some new CMOS circuit design technologies. The HM51(S)4260C offers fast page mode as a
high speed access mode. Multiplexed address input permits the HM51(S)4260C to be packaged in standard
400-mil 40-pin plastic SOJ and standard 400-mil 44-pin plastic TSOPII. Internal refresh timer enables
HM51S4260C self refresh operation.
Features
Single 5 V (
±
10%) (HM51(S)4260C-6/7/8)
(
±
5%) (HM51(S)4260C-6R)
High speed
— Access time: 60 ns/70 ns/80 ns (max)
Low power dissipation
— Active mode: 825 mW/788 mW/770 mW/688 mW (max)
— Standby mode: 11 mW (max) (HM51(S)4260C-6/7/8)
10.5 mW (max) (HM51(S)4260C-6R)
1.1 mW (max) (L-version) (HM51(S)4260C-6/7/8)
1.05 mW (max) (L-version) (HM51(S)4260C-6R)
Fast page mode capability
512 refresh cycles: 8 ms
128 ms (L-version)
2
CAS
-byte control
2 variations of refresh
—
RAS
-only refresh
—
CAS
-before-
RAS
refresh
Battery backup operation (L-version)
Self refresh operation (HM51S4260C)
相關PDF資料 |
PDF描述 |
|---|---|
| HM514260CLJ-7 | 262,144-word x 16-bit Dynamic Random Access Memory |
| HM51S4260CLJ-7 | 262,144-word x 16-bit Dynamic Random Access Memory |
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| HM514400ALJ-7 | LJT 37C 37#22D SKT RECP |
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相關代理商/技術參數 |
參數描述 |
|---|---|
| HM51W17805J-6GS | 制造商:Hitachi 功能描述: |
| HM51W18160CLTT-6 | 制造商:Renesas Electronics Corporation 功能描述: |
| HM51W18165LTT6 | 制造商:HITACHI 功能描述:* |
| HM51W4260CLTT-6 | 制造商:Hitachi 功能描述: |
| HM5212165/2805 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Series 128M LVTTL Interface SDRAM 66 MHz 2-Mword X 16-Bit X4-Bank |
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